Current-Mirror Level Shifter With Feedback Leakage Blocking
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Solution Overview
Problem
Conventional level shifters have a limited range of output voltage, making them unsuitable for electronic devices requiring higher logic levels, and they fail to prevent leakage currents in current mirrors.
Innovation Solution
A semiconductor device with a level shifter that includes a current mirror and a current mirror control circuit, which uses a plurality of transistors to control the current mirror and output voltage based on sink node voltage, effectively blocking leakage currents and shifting voltage levels to a higher logic level range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a general level shifter is used to shift logic levels, then compatibility between devices with voltage up to 5V is achieved, but it cannot provide output voltages for devices requiring higher logic levels (above 5V)
Solution Approach 1:
The level shifter is divided into multiple functional blocks: input inverter circuit, current mirror circuit, current mirror control circuit, and output circuit. Each block performs a specific function, allowing the system to achieve high voltage output capability while maintaining proper signal levels and blocking leakage currents through specialized control mechanisms in each segment
Solution Approach 2:
The current mirror control circuit acts as an intermediary between the current mirror circuit and the output circuit. It controls the current mirror using sink node voltage feedback and generates control signals that regulate the output voltage, enabling the system to output voltages above 5V while preventing leakage currents from affecting signal integrity
2Adaptability or versatility
If the output voltage range is extended to higher logic levels, then compatibility with high-voltage devices is improved, but leakage currents in the current mirror become problematic
Solution Approach 1:
The current mirror control circuit uses feedback from the sink node voltage to control the current mirror. The sink node voltage is fed back to the gate terminal of the control transistor, creating a negative feedback mechanism that stabilizes the current mirror operation and prevents leakage currents even when output voltage exceeds 5V
Solution Approach 2:
The invention changes the operating parameters of the current mirror by using sink node voltage control instead of traditional fixed biasing. This dynamic parameter adjustment allows the current mirror to operate correctly across a wider voltage range while maintaining low leakage current through adaptive control of the mirror transistors
3Device complexity
If conventional level shifters are used, then circuit simplicity is maintained, but they fail to provide sufficient output voltage range for modern high-voltage devices
Solution Approach 1:
The level shifter is designed with multi-functionality to handle both standard voltage levels (up to 5V) and high voltage levels (above 5V) within the same circuit architecture. The current mirror control circuit and sink node voltage feedback mechanism enable the circuit to adapt to different voltage requirements, making it universally compatible with various devices without requiring separate level shifters for different voltage domains
Data Source
AI summary
A level shifter for outputting an output voltage having a voltage level range different from a voltage level range of a received input voltage is disclosed. The level shifter includes: a current mirror configured to copy a reference current flowing through a first mirror transistor to a second mirror transistor; a current mirror control circuit electrically connected to the current mirror by a sink node and including a plurality of control transistors configured to control the current mirror; and an output circuit configured to output an output voltage based on a voltage level of the sink node, wherein a first control transistor of the plurality of control transistors receives the output voltage fed back to a gate terminal of the first control transistor, and a second control transistor of the plurality of control transistors receives an inverted output voltage fed back to a gate terminal of the second control transistor.