Level Shifter Biasing Circuit for Fast Isolation Startup
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Solution Overview
Problem
Level shifters in circuit devices often experience delays and uncertain states during power domain transitions, leading to errors due to parasitic capacitance and slow startup times, especially when biasing multiple level shifters, which can result in erroneous output signals.
Innovation Solution
A biasing circuit with a timer component and current source is used to quickly charge a capacitor, injecting additional current for a controlled period and then maintaining standby current to ensure rapid activation of level shifters, while generating an isolation delayed signal to prevent uncertain states and ensure valid logic states during power domain transitions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single biasing circuit is used to bias multiple level shifters, then device complexity is reduced, but activation delays increase due to parasitic capacitance
Solution Approach 1:
The biasing circuit performs preliminary action by pre-charging the capacitor to a first voltage level before the level shifter needs to activate. When activation is required, the capacitor is quickly recharged to a second voltage level, significantly reducing the activation delay compared to charging from zero. This preliminary preparation resolves the contradiction by maintaining simplicity while enabling fast activation.
2Speed
If additional current is injected to quickly charge the capacitor, then activation speed improves, but energy consumption increases
Solution Approach 1:
The biasing circuit implements periodic action through a timer that controls the periodic injection of additional current into the capacitor. The timer activates the additional current source only during specific periods when quick activation is needed, rather than continuously. This resolves the contradiction by providing high-speed activation when required while minimizing energy consumption during normal operation.
Solution Approach 2:
The circuit changes the current parameter dynamically by switching between normal biasing current and enhanced additional current based on activation requirements. The current source adjusts its output parameter (current magnitude) according to the timing signal, providing high current for fast charging only when needed, thereby resolving the speed-energy contradiction.
3Productivity
If the capacitor is quickly recharged to ensure rapid activation, then productivity improves, but uncertain states may occur during transition
Solution Approach 1:
The biasing circuit applies beforehand cushioning by maintaining the capacitor at a predefined first voltage level that keeps the level shifter in a stable standby state. During quick recharging to the second voltage level, the circuit ensures the transition occurs in a controlled manner that prevents the level shifter from entering uncertain states. This prior preparation cushions against reliability issues while enabling rapid activation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution minimizes delays in activating level shifters, prevents uncertain states, and guarantees valid logic states during power domain transitions, enhancing the reliability and efficiency of level shifter operations in circuit devices.
Implementation Method 1
a capacitor coupled between the first node and a ground potential
Implementation Method 2
The timer component controls injection of current by a current source into the load circuit for a period of time, in response to a transition of an isolation signal between a high voltage and a low voltage
Data Source
AI summary
A circuit includes a biasing circuit that includes a diode stack coupled to a first node. The biasing circuit can output a biasing signal on the first node. The biasing circuit also includes a transistor, a timer component and a current source. An input of the timer component is coupled to receive an isolation signal. The current source is configured to inject current for a period of time into the diode stack in response to a transition of the ISO signal between a first voltage and a second voltage. The biasing circuit also is configured to output a signal to a level shifter to hold an output of the level shifter in a known state for a specified amount of time after power-up of the circuit for proper operation of the level shifter.