Single-Supply Level Shifter With Leakage-Blocking Transistor Cascade
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Solution Overview
Problem
Conventional level shifters require additional design complexity due to multiple voltage sources and suffer from slow performance and mismatched transistor dimensions, leading to signal delay and inaccurate signal propagation between core logic and I/O units.
Innovation Solution
A level shifter design incorporating a leakage current blocking circuit with cascaded P-channel transistors and an N-channel transistor, powered by a single voltage source, which effectively converts input signals from one voltage range to another without positive feedback, reducing complexity and enhancing speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If conventional level shifter design with multiple voltage sources and positive feedback is used, then level shifting function is achieved, but circuit complexity increases and signal delay occurs
Solution Approach 1:
The patent extracts and removes the positive feedback mechanism from the conventional level shifter design. By eliminating the feedback path that caused slow response and signal delay, the invention achieves faster signal propagation while maintaining level shifting functionality through a direct feedforward transistor cascade structure.
Solution Approach 2:
The patent uses a single voltage source VDD to power both the input stage (first transistor) and the output stage (second and third transistors), eliminating the need for multiple voltage sources. This universal power approach reduces circuit complexity while maintaining the ability to shift signals between different voltage domains through clever transistor configuration.
2Adaptability or versatility
If multiple voltage sources are used to power different stages, then level shifting capability is improved, but design complexity increases
Solution Approach 1:
The patent employs a single voltage source VDD that serves multiple functions: powering the input transistor, establishing the voltage reference for level shifting, and enabling the output transistors to operate across different voltage domains. This universal power approach achieves voltage range compatibility without requiring multiple separate voltage sources.
Solution Approach 2:
The patent changes the operating parameters of the transistors by using different oxide thicknesses (thin oxide for input transistor, thick oxide for output transistors) to accommodate different voltage ranges while maintaining a single voltage source architecture. This allows the circuit to adapt to different voltage domains through device parameter optimization rather than multiple power supplies.
3Adaptability or versatility
If transistor dimensions are varied to match voltage sources, then voltage compatibility is improved, but manufacturing precision becomes more difficult
Solution Approach 1:
The patent intentionally varies transistor parameters including oxide thickness and channel width to radius ratios to optimize performance for different voltage domains. By carefully controlling these parameters during manufacturing, the circuit achieves voltage domain compatibility while maintaining manufacturability through standardized process techniques.
Solution Approach 2:
The patent applies different transistor design characteristics to different parts of the circuit: thin oxide transistors for the input stage handling lower voltages, and thick oxide transistors for the output stage handling higher voltages. This local optimization allows each transistor to be designed for its specific operating conditions while maintaining overall circuit compatibility.
4Ease of operation
If positive feedback design is used, then circuit operation is simplified, but transition speed decreases
Solution Approach 1:
The patent removes the positive feedback mechanism from the circuit design. Instead of using feedback to maintain operation, the invention relies on a direct feedforward cascade of transistors where the input signal propagates directly through the transistor chain to the output, eliminating the delay inherent in feedback loops while maintaining circuit functionality.
Solution Approach 2:
The patent prepares the transistor cascade in advance to be ready for signal propagation. The transistors are configured and biased beforehand through the single voltage source, so that when an input signal arrives, it can immediately propagate through the pre-configured transistor chain without waiting for feedback loops to establish the correct operating state.
Data Source
AI summary
A level shifter, converting an input signal into an output signal for level shifting, including a leakage blocking circuit having cascaded P-channel transistors and one N-channel transistor. The P-channel transistor at a beginning stage provides a gate for receiving the input signal and a source coupled to a gate of the P-channel transistor at a secondary stage. At intermediate stages, each P-channel transistor provides a source coupled to a gate of the subsequently cascaded P-channel transistor. At a final stage, the P-channel transistor provides a source coupled to a voltage source and a drain coupled to an output terminal of the leakage blocking circuit for the outputting of the output signal. The N-channel transistor has a gate which is coupled to receive the input signal as well, a source coupled to a common voltage, and a drain coupled to the output terminal of the leakage blocking circuit.