Header-Controlled Level Shifter Circuit for Leakage Reduction
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Solution Overview
Problem
As semiconductor integrated circuits (ICs) become smaller and more complex, the decreasing operating voltages affect IC performance, and existing level shifter circuits face challenges in efficiently managing voltage domains and reducing leakage current, leading to higher power consumption.
Innovation Solution
The proposed solution involves a circuit configuration with a level shifter circuit that includes a header circuit and paths enabled/disabled by an enable signal, reducing leakage current and power consumption by using a header transistor to manage voltage swings between different voltage domains.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the level shifter circuit is continuously enabled to maintain voltage domain operation, then signal transmission between voltage domains is ensured, but leakage current and power consumption increase
Solution Approach 1:
The level shifter circuit transitions from a static continuously-enabled state to a dynamic state where it can be selectively enabled or disabled. The enable signal controls the header transistor to dynamically switch the circuit between active and low-power states, allowing the system to adapt power consumption to actual signal transmission needs.
Solution Approach 2:
The level shifter circuit operates in periodic cycles of being enabled when signal transmission is required and disabled when not needed. This periodic activation pattern, controlled by the enable signal, reduces average power consumption while ensuring signal transmission reliability when active.
2Loss of energy
If the level shifter circuit is disabled to reduce power consumption, then leakage current decreases, but signal transmission between voltage domains is interrupted
Solution Approach 1:
The enable signal provides control feedback to the header transistor, allowing the system to monitor when signal transmission is needed and accordingly enable or disable the level shifter circuit. This feedback mechanism ensures signal transmission reliability is maintained when required while enabling power savings when not needed.
3Productivity
If operating voltage is decreased to improve IC performance in smaller devices, then device scaling is achieved, but voltage domain management complexity increases
Solution Approach 1:
The header transistor acts as an intermediary element that simplifies voltage domain management. It provides a controlled interface between different voltage domains, allowing the level shifter circuit to efficiently manage voltage transitions without adding significant complexity to the overall IC design.
Data Source
AI summary
A circuit includes an input circuit, a level shifter circuit and an output circuit. The input circuit is coupled to a first voltage supply, and configured to receive a first input signal, and to generate at least a second or a third input signal. The level shifter circuit is coupled to the input circuit and a second voltage supply, and configured to receive a first enable signal, the second or third input signal, and to generate a first signal responsive to the first enable signal, the second input signal or the third input signal. The level shifter circuit includes a header circuit coupled to a first node, and is configured to enable or disable the level shifter circuit responsive to the first enable signal. The output circuit is coupled to at least the level shifter circuit and the second voltage supply, and is configured to generate an output signal.