Level Shifter Using Low Threshold N-MOSFETs for High-Speed Voltage Translation

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Solution Overview

Problem

Conventional level shifters fail to perform high-speed level shifting due to a small difference between the high level of the input voltage and the threshold voltage of N-channel MOSFET transistors, which prevents effective pulling of the gate voltage of P-channel MOSFET transistors to achieve high output voltage.

Innovation Solution

The level shifter employs low threshold voltage transistors or native transistors for N-channel MOSFETs, coupled with switches to control leakage currents and prevent floating drains, widening the voltage difference and enabling high-speed level shifting by effectively turning on P-channel MOSFETs to pull high the output voltage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional N-channel MOSFET transistors with high threshold voltage (0.8V) are used to receive low voltage input signals (0.9V high level), then the transistor structure is stable and easy to manufacture, but the voltage difference between input signal and threshold voltage is too small to effectively pull low the gate voltage of P-channel MOSFET transistors, resulting in inability to perform high-speed level shifting or high voltage level shifting

Engineering Contradiction:
Improvelevel shifting capabilityVSAvoidtransistor threshold voltage matching
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent changes the threshold voltage parameter of the N-channel MOSFET transistors from conventional high threshold voltage (0.8V) to low threshold voltage (0.3V or lower), enabling the transistors to effectively respond to low voltage input signals with 0.9V high level. This parameter change allows the transistors to pull low the gate voltage of P-channel MOSFET transistors and achieve high-speed level shifting from low voltage to high voltage levels.

Inventive Principle:
Principle #35Parameter changes

2Use of energy by moving object

If the input voltage high level is reduced from 1.2V to 0.9V to match lower voltage requirements, then power consumption is reduced and compatibility with low voltage front-end elements is improved, but the difference between input voltage and transistor threshold voltage becomes too small to enable effective switching

Engineering Contradiction:
Improvepower consumptionVSAvoidswitching speed
Core Design Contradiction:
Use of energy by moving objectVSProductivity

Solution Approach 1:

The patent reduces the threshold voltage parameter of N-channel MOSFET transistors to 0.3V or lower, which creates sufficient voltage margin when receiving 0.9V high level input signals. This enables fast switching action and high-speed level shifting while maintaining compatibility with low voltage front-end elements and achieving the desired power consumption levels.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If low threshold voltage transistors are used to enable high-speed level shifting, then switching speed and level shifting capability are improved, but leakage currents increase and voltage control becomes more difficult

Engineering Contradiction:
Improveswitching speedVSAvoidleakage current
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The patent introduces P-channel MOSFET transistors as intermediary elements that are controlled by the low threshold voltage N-channel MOSFET transistors. The P-channel transistors act as switches that pull high the output voltage when activated, providing a mechanism to achieve high-speed level shifting while managing the leakage current issues inherent in low threshold voltage transistors through the intermediary switching action.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS9356584B2Level shifter
Publication Date: 2016.05.31 NOVATEK MICROELECTRONICS CORP
  • US9356584B2 patent drawing
  • US9356584B2 patent drawing
  • US9356584B2 patent drawing

AI summary

A level shifter for high-speed level shifting includes a first P-channel transistor, comprising a gate coupled to a drain, and a source coupled to a system voltage; a second P-channel transistor, comprising a gate coupled to the gate of the first P-channel transistor, and a source coupled to the system voltage; a first N-channel transistor, comprising a drain coupled to the drain of the first P-channel transistor, and a source coupled to a ground level; and a second N-channel transistor, comprising a drain coupled to a drain of the second P-channel transistor, and a source coupled to the ground level; wherein the first N-channel transistor and the second N-channel transistor are low-threshold-voltage transistors or native transistors.