Level Shifter Self-Generating Mode Signals
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Solution Overview
Problem
As display devices become larger and higher in resolution, the increasing number of input terminals and signal lines for level shifters limits design freedom and increases manufacturing costs, necessitating a reduction in these components.
Innovation Solution
A level shifter capable of self-generating mode signals using internal clock signals to adjust driving modes, reducing the need for external inputs and optimizing the generation of scan clock signals to minimize overlap and maximize design flexibility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the number of input terminals and signal lines is increased to support higher resolution and larger display devices, then the display quality and resolution are improved, but the design freedom is reduced and manufacturing costs increase
Solution Approach 1:
The level shifter is designed to perform multiple functions using a reduced set of signal lines. It can operate in different driving modes (1T1C, 2T2C, 3T3C) and generate multiple scan clock signals (CLK1-CLK4) through internal mode signal generation, making the same hardware configuration adaptable to various display resolutions and panel types without requiring additional dedicated signal lines for each function.
Solution Approach 2:
The level shifter internally generates mode signals (MODE1, MODE2) based on the input clock signals CLK_IN1 and CLK_IN2, eliminating the need for external mode signal inputs. The circuit autonomously determines its operating mode and configures its internal logic circuits accordingly, reducing the number of external control terminals required while maintaining full functionality.
2Adaptability or versatility
If more signal lines are used to control driving modes externally, then the adaptability to different display configurations is improved, but the device complexity and manufacturing cost increase
Solution Approach 1:
The level shifter internally generates mode signals (MODE1, MODE2) based on the input clock signals CLK_IN1 and CLK_IN2, eliminating the need for external mode signal inputs. The circuit autonomously determines its operating mode and configures its internal logic circuits accordingly, reducing the number of external control terminals required while maintaining full functionality.
Solution Approach 2:
The level shifter changes its operational parameters by internally generating different mode signals based on the characteristics of the input clock signals. By detecting the presence and characteristics of CLK_IN1 and CLK_IN2, the circuit dynamically adjusts its driving mode (1T1C, 2T2C, or 3T3C) and signal generation behavior, achieving adaptability without external control lines.
Data Source
AI summary
A display device can include a timing controller; a level shifter including a signal input circuit to receive a first clock signal and a second clock signal, a driving mode conversion circuit to self-generate one or more mode signals based on the first and second clock signals for adjusting a driving mode, and a signal output circuit to generate a plurality of scan clock signals based on the one or more mode signals, the first and second clock signals; a shift register configured to generate a scan signal based on the plurality of scan clock signals; and a display panel configured to display an image based on the scan signal. Also, the level shifter is configured to in response to a width of a pulse of the first clock signal being greater than a threshold value, sequentially output a pulse for each of the plurality of scan clock signals.