Level Shifter Chip Multiplexing for Display Panel Driving
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Solution Overview
Problem
The existing driving circuits for flat-panel liquid crystal displays, particularly the level shifter chips, are costly and resource-intensive due to the need for multiple separate level shifters to amplify signals, leading to increased production costs and panel thickness.
Innovation Solution
A driving circuit comprising a timing controller, a level shifter with a first and second switch group, and an operational amplifier, where the timing controller outputs clock signals to the level shifter, which then drives the display panel by controlling the on-state of switch transistors and devices, reducing the need for multiple level shifters by multiplexing functions within a single operational amplifier.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple separate level shifters are used to amplify each GOA signal, then signal amplification is achieved, but device complexity and cost increase substantially
Solution Approach 1:
The patent combines multiple level shifter functions into a single level shifter chip. Instead of using separate level shifters for each GOA signal, the invention integrates multiple signal amplification channels within one chip, reducing the total number of components while maintaining the required signal amplification for each channel
Solution Approach 2:
The level shifter chip is designed with multi-functionality to handle multiple GOA signals simultaneously. The chip contains multiple sets of switch transistors and operational amplifiers that can process different clock signals (CK1-CK12) through shared common lines, allowing one chip to perform the work of multiple separate level shifters
2Reliability
If multiple separate level shifters are used, then each signal can be amplified independently, but the package size increases
Solution Approach 1:
The patent merges multiple level shifter functions into a single integrated chip, consolidating what would otherwise be multiple separate packages into one compact unit. This integration dramatically reduces the overall package size while maintaining all necessary signal amplification capabilities
Solution Approach 2:
The invention employs a nested structure where multiple signal processing functions are embedded within a single chip architecture. The chip contains multiple sets of switch transistors and operational amplifiers nested within shared common signal lines and power connections, allowing compact arrangement of multiple functions in a hierarchical manner
3Reliability
If multiple separate level shifters are used, then signal amplification is ensured, but production cost increases
Solution Approach 1:
The patent combines multiple level shifter functions into a single manufacturable chip unit. This consolidation reduces the total number of discrete components that need to be sourced, assembled, and tested, thereby lowering production costs while ensuring all signal amplification requirements are met through the integrated multi-channel architecture
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration optimizes the internal circuit of the level shift register chip, reducing costs and panel thickness by minimizing the number of level shifters required, while maintaining effective signal amplification and panel operation.
Implementation Method 1
the level shifter comprises a first switch group, an operational amplifier connected to the first switch group, and a second switch group connected to the operational amplifier
Data Source
AI summary
The present invention provides a driving circuit and a display panel to which it is applied. The driving circuit applied to the display panel includes: a timing controller, a level shifter connected to the timing controller and including a first switch group, an operational amplifier connected to the first switch group, and a second switch group connected to the operational amplifier.


