Level Shifter Layout Using Narrow NMOS Gates for Low-Voltage Operation
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Solution Overview
Problem
Existing level shift circuits face difficulties in operating reliably at low voltage levels due to reduced driving current ability of n-type transistors, leading to increased circuit area and process costs when attempting to lower the operation voltage.
Innovation Solution
The solution involves reducing the unit gate width size of n-type transistors to take advantage of the reverse narrow property, thereby lowering the threshold voltage without increasing circuit area or process costs, by arranging gates in the gate length direction with the short side of the doped region, allowing for reliable low voltage operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by stationary object
If the power supply voltage is reduced to low voltage level, then power consumption is reduced, but the driving current ability of n-type transistors is reduced making reliable operation difficult
Solution Approach 1:
The patent changes the physical parameter of gate width to exploit the reverse narrow width effect. By reducing the gate width of n-type transistors to a specific narrow range (0.5-2.0 times the channel length), the threshold voltage is reduced, which compensates for the reduced driving current ability at low voltage levels, enabling reliable operation at low power consumption
Solution Approach 2:
The patent applies different gate width specifications to different transistor locations within the circuit. Specifically, n-type transistors in the level shift circuit are given narrow gate widths to reduce threshold voltage, while other transistors maintain standard dimensions, creating localized optimization for low-voltage operation
2Reliability
If the gate width of n-type transistors is increased to improve driving current ability, then reliable operation at low voltage is achieved, but circuit area increases
Solution Approach 1:
Instead of increasing gate width to improve driving current, the patent changes the gate width parameter to a narrow range that exploits the reverse narrow width effect to reduce threshold voltage. This alternative parameter adjustment achieves reliable low-voltage operation without increasing circuit area, in fact reducing it compared to conventional designs
3Reliability
If additional circuits are added to improve low voltage operation, then reliable operation is achieved, but device complexity increases
Solution Approach 1:
The patent makes the n-type transistors self-optimizing by designing their gate dimensions to automatically exploit the reverse narrow width effect. This physical design allows the transistors to maintain reliable low-voltage operation through their inherent electrical characteristics rather than requiring additional control circuits or compensation mechanisms
Solution Approach 2:
The patent achieves low voltage operation by changing the gate width parameter to a specific narrow range, which fundamentally alters the transistor's electrical characteristics to enable reliable operation without adding any additional circuit components or complexity
Data Source
AI summary
In a level shift circuit, even when a power supply voltage of an input signal is reduced, a level shift operation is reliably performed without causing increase in circuit area and process costs. For a pair of n-type transistors which receive an input signal and a reverse signal of the input signal as a pair of complementary signals at their gates, respectively, a layout which allows reduction in unit gate width size is adopted. The layout configuration includes a plurality of divided rectangular doped regions which function as drains and sources and a plurality of gates arranged to align in a gate length direction with a gate width direction according with a short side direction of the doped regions. The gates are electrically connected with one another, the drains are electrically connected with one another, and the sources are electrically connected with one another.