Level Shifter Circuit for High Positive and Negative Voltages
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Solution Overview
Problem
Existing level shifting circuits in integrated circuits are unable to efficiently handle high positive and increasingly negative voltages, leading to voltage range violations and contention issues, which affect the performance and reliability of non-volatile memory devices.
Innovation Solution
A level shifting circuit design that includes negative voltage shifting circuitry with NMOS transistors and positive voltage shifting circuitry with high voltage transistors, utilizing a combination of inverters and cross-coupled gates to manage input signals and provide amplified voltages within acceptable voltage ranges, ensuring efficient switching between positive and negative output voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If a level shifter uses NMOS transistors and a local charge pump to raise gate voltage for passing high positive voltages, then the voltage amplification capability is improved, but the circuit cannot efficiently handle increasingly negative voltages without violating acceptable voltage range (AVR) characteristics
Solution Approach 1:
The level shifter is divided into separate positive voltage shifting circuitry and negative voltage shifting circuitry. The positive voltage shifting circuitry includes NMOS transistors and charge pump for handling positive voltages, while the negative voltage shifting circuitry uses PMOS transistors and inverted charge pump for handling negative voltages. This segmentation allows each circuit to be optimized for its specific voltage range without compromising the other.
Solution Approach 2:
For negative voltage shifting, the circuit inverts the charge pump operation and uses PMOS transistors instead of NMOS transistors. The charge pump that normally generates positive high voltages is inverted to generate negative high voltages, and PMOS transistors with their gates connected to inverted charge pump outputs enable efficient negative voltage passing while maintaining AVR characteristics.
2Device complexity
If the level shifter is designed to pass only positive voltages or slightly negative voltages, then the circuit complexity is reduced, but it cannot meet applications requiring increasingly negative voltages
Solution Approach 1:
The level shifter achieves multi-functionality by integrating both positive and negative voltage shifting capabilities into a single circuit. The positive voltage shifting circuitry and negative voltage shifting circuitry share common input/output nodes and control logic, allowing the circuit to handle both positive and negative voltage ranges efficiently without requiring separate circuits for each function.
3Area of stationary object
If the level shifter uses a single voltage shifting path, then the device area is minimized, but switching speed between positive and negative voltages is reduced
Solution Approach 1:
The circuit employs dynamic switching mechanisms where control signals enable or disable specific transistor paths based on the desired voltage output. The positive voltage shifting circuitry and negative voltage shifting circuitry can be activated or deactivated dynamically, allowing fast switching between positive and negative voltage modes without requiring physical reconfiguration of the circuit topology.
Data Source
AI summary
A level shifting circuit includes negative voltage shifting circuitry including a first leg and a second leg. The first leg includes a first plurality of NMOS transistors in series with a first input node and a negative amplified voltage, and the second leg includes a second plurality of NMOS transistors in series with a second input node and the negative amplified voltage. The level shifting circuit further includes positive voltage shifting circuitry including a first plurality of high voltage transistors in series with a positive amplified voltage and an output node of the level shifting circuit, and a second plurality of high voltage transistors in series with a first intermediate node of the first leg of the negative voltage shifting circuitry and the output node of the level shifting circuit. The level shifting circuitry further includes input circuitry including a plurality of inverters.