Level Shifter Freezing Circuit for Common-Mode Noise Immunity
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Solution Overview
Problem
Conventional level shifters in high-side gate driver circuits are vulnerable to common mode noise, leading to malfunctions and increased propagation delay due to parasitic capacitance, especially when high-speed operation requires larger high-voltage transistors.
Innovation Solution
A level shifter design incorporating a first and second resistor and transistor pair, a converter, current sensing circuit, and freezing circuit to generate driving signals and control operations, preventing simultaneous high-level output signals during common mode noise and providing a bypass path to reduce propagation delay and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the size of high voltage transistor is increased for high-speed operation, then operating speed is improved, but current consumption and parasitic capacitance increase
Solution Approach 1:
The patent divides the level shifter circuit into multiple independent paths: a first path with a first transistor for generating first driving signals, and a second path with a second transistor for generating second driving signals. This segmentation allows each transistor to operate independently, enabling high-speed operation without requiring excessive current from a single large transistor, thus reducing overall current consumption and parasitic capacitance effects.
2Speed
If the size of high voltage transistor is increased for high-speed operation, then operating speed is improved, but propagation delay increases
Solution Approach 1:
The patent divides the level shifter circuit into multiple independent paths: a first path with a first transistor for generating first driving signals, and a second path with a second transistor for generating second driving signals. This segmentation allows each transistor to operate independently, enabling high-speed operation without requiring excessive current from a single large transistor, thus reducing overall current consumption and parasitic capacitance effects.
3Device complexity
If conventional level shifter is used, then circuit structure is simple, but vulnerability to common mode noise increases
Solution Approach 1:
The patent divides the level shifter circuit into multiple independent paths: a first path with a first transistor for generating first driving signals, and a second path with a second transistor for generating second driving signals. This segmentation allows each transistor to operate independently, enabling high-speed operation without requiring excessive current from a single large transistor, thus reducing overall current consumption and parasitic capacitance effects.
Solution Approach 2:
The patent introduces a common source node that serves as an intermediary for both the first and second transistors. This common source configuration, combined with the dual-path architecture, provides noise immunity by ensuring that common mode noise affecting both paths equally does not cause malfunction, as the differential nature of the circuit rejects such noise.
4Device complexity
If conventional level shifter is used, then circuit structure is simple, but malfunction risk due to common mode noise increases
Solution Approach 1:
The patent divides the level shifter circuit into multiple independent paths: a first path with a first transistor for generating first driving signals, and a second path with a second transistor for generating second driving signals. This segmentation allows each transistor to operate independently, enabling high-speed operation without requiring excessive current from a single large transistor, thus reducing overall current consumption and parasitic capacitance effects.
Solution Approach 2:
The patent introduces a common source node that serves as an intermediary for both the first and second transistors. This common source configuration, combined with the dual-path architecture, provides noise immunity by ensuring that common mode noise affecting both paths equally does not cause malfunction, as the differential nature of the circuit rejects such noise.
Data Source
AI summary
A level shifter includes a converter configured to generate a first driving signal and a second driving signal; a current sensing circuit configured to detect a current corresponding to a voltage change of second power, and generate a freezing signal according to the current; a freezing circuit configured to control an operation of the converter according to the freezing signal.


