Level Shifter Circuit With Inactive Current Mirrors at Power Loss
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Solution Overview
Problem
Traditional level shifters experience indeterminate states and high power consumption in the absence of an input power supply, making them unsuitable for power-sensitive applications.
Innovation Solution
The proposed level shifter design includes a first and second current mirror, a capacitor, an input transistor, and a latching transistor, which allows the circuit to maintain a well-defined output state and reduce power consumption by deactivating current mirrors when the input power supply is low, using a combination of current mirrors and a capacitor to manage voltage transitions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If traditional logic translators are used in the absence of input power supply, then the circuit structure remains simple, but the power consumption becomes prohibitively high due to indeterminate states and large leakage
Solution Approach 1:
The level shifter dynamically changes its operating state based on the presence or absence of the input power supply. When VDD1 is present, the circuit operates in translation mode with current mirrors active. When VDD1 is absent, the circuit transitions to a low-power state where current mirrors are deactivated and leakage is minimized, while the output remains in a well-defined state through the latching mechanism.
Solution Approach 2:
The invention changes the operational parameters of the current mirrors based on the input power supply status. The first and second current mirrors are activated when VDD1 is present and deactivated when VDD1 is absent, thereby adapting the power consumption and output state determination characteristics to the available power conditions.
2Device complexity
If traditional logic translators are used without input power supply, then the device complexity remains low, but the leakage current becomes unacceptably large
Solution Approach 1:
The current mirrors are designed to be dynamically controllable, allowing them to be deactivated when the input power supply is absent. This dynamic control reduces leakage current significantly compared to traditional static designs, while the additional control logic is minimized through efficient use of existing circuit elements.
Solution Approach 2:
The capacitor couples the first current mirror to the second terminal and works together with the latching transistor to maintain a well-defined output state without requiring continuous power. This intermediary mechanism allows the circuit to retain state information and control leakage without adding significant complexity.
3Use of energy by moving object
If the input power supply is disabled to conserve battery life, then power consumption is reduced, but the output state becomes indeterminate in traditional level shifters
Solution Approach 1:
The latching transistor is designed to preemptively establish a well-defined output state before the power supply is completely disabled. This preliminary action ensures that the output remains in a known state even as power is removed, preventing indeterminate conditions and maintaining system reliability during power transitions.
Solution Approach 2:
The circuit incorporates feedback mechanisms through the latching transistor that monitor the power supply status and automatically adjust the output state accordingly. This feedback ensures that the output remains well-defined and predictable regardless of the input power supply condition, eliminating the need for external reset signals.
Data Source
AI summary
Methods and devices to decrease the power consumption of level shifters in the absence of input power supply are disclosed. The described devices include current mirrors that are inactive when the level shifter is in the HIGH or LOW steady state. The disclosed methods further include a delay element used to keep the power consumption low in the case of slow input power supply ramps.