Level Shifter Circuit for Safe High-Voltage Power-Up Sequencing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing semiconductor integrated circuit devices face issues with withstand voltage violations and unnecessary current flow when a high-voltage power source rises before a low-voltage power source, leading to potential transistor damage and inefficiencies.
Innovation Solution
A semiconductor integrated circuit device configuration that includes a first p-type transistor with its source connected to a first power source, a second p-type transistor with its source connected to the drain of the first transistor, a step-down circuit to generate a second power source, a power source switch circuit to output the higher potential of the second and third power sources, and a level shifter circuit to manage the voltage between the first and fourth power sources, ensuring no withstand voltage violation occurs regardless of the power source rise order.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the high-voltage power source rises before the low-voltage power source, then the circuit can operate with high-voltage signal input, but withstand voltage violations occur in transistors causing potential damage
Solution Approach 1:
The patent introduces a level shifter circuit as an intermediary component between the high-voltage power source and the low-voltage transistor gates. This level shifter converts the high-voltage power source signal to a low-voltage control signal, ensuring that transistors never experience voltage exceeding their withstand voltage regardless of power source rise order. The intermediary isolates the transistors from direct exposure to high voltage during power-up transitions.
2Adaptability or versatility
If the high-voltage power source rises before the low-voltage power source, then high-voltage signal processing is enabled, but unnecessary current flows from the high-voltage power source through the low-voltage power source to ground
Solution Approach 1:
The patent employs dynamic control of transistor gates through level-shifted signals that adapt to the real-time voltage states of both power sources. The control circuit dynamically adjusts transistor conductivity based on whether the high-voltage or low-voltage power source has risen first, preventing unnecessary current paths while maintaining high-voltage signal processing capability. This dynamic adaptation eliminates static design limitations.
3Power
If low-voltage transistors are used in the output circuit, then power consumption is reduced and operating speed is improved, but the transistors cannot directly handle high-voltage signals
Solution Approach 1:
The patent segments the output circuit into distinct voltage domains: high-voltage signal paths and low-voltage control paths. Low-voltage transistors handle control functions and low-power operations, while high-voltage signals are routed through dedicated high-voltage switches and isolation circuits. This segmentation allows low-voltage transistors to operate efficiently without direct exposure to high voltage, maintaining both low power consumption and high-voltage compatibility.
Data Source
AI summary
A semiconductor integrated circuit device includes: first and second transistors provided between a first power source and an output terminal; a step-down circuit that generates a second power source from the first power source; a power source switch circuit that outputs, as a fourth power source, a higher one of potentials of the second power source and a third power source; and a level shifter circuit that transits between the first power source and a fourth power source. The first transistor has a gate connected to an output of the level shifter circuit; the second transistor has a gate connected to the fourth power source.