Level Shifter Reset Circuit for Low-Voltage Ramp-Up Stability
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Solution Overview
Problem
Conventional level shifters fail to maintain correct output characteristics when input levels are intermediate, leading to excessive leakage current and undefined output states during power ramp-up/down, and are unreliable in systems with varying supply voltages.
Innovation Solution
A level shifter circuit with a sense and reset module that senses the core supply voltage and maintains input and internal nodes at predetermined levels, ensuring forward supply voltage levels within predefined ranges, thereby preventing excessive leakage and maintaining defined output states during power changes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional level shifter is used to shift voltage levels between ICs, then voltage level shifting is achieved, but the circuit produces excessive leakage current and undefined output states when supply voltages are below threshold levels or during power ramp-up/down
Solution Approach 1:
The patent applies preliminary action by detecting the core supply voltage level before the level shifting operation and preparing the circuit accordingly. The sense circuit detects whether VDDCORE is below the threshold voltage VT, and the reset circuit proactively sets input nodes and internal nodes to predetermined voltage levels before the level shifter attempts to operate, preventing leakage current and undefined states from occurring in the first place
Solution Approach 2:
The patent introduces intermediary elements including a sense circuit that detects voltage levels and a reset circuit that conditions input nodes and internal nodes based on the detected state. These intermediary circuits act as mediators between the core supply voltage and the level shifter operation, ensuring the level shifter only operates when appropriate voltage conditions are met, thereby eliminating harmful leakage current
2Loss of energy
If the core supply voltage drops below the threshold level required for level shifting operation, then power consumption is reduced, but the level shifter cannot provide correct output characteristics and may cause indefinite current flow
Solution Approach 1:
The patent implements feedback through the sense circuit that continuously monitors the core supply voltage level VDDCORE and compares it against the threshold voltage VT. This feedback mechanism enables the reset circuit to respond to voltage conditions and maintain input nodes and internal nodes at appropriate predetermined levels, ensuring defined output states even when power consumption is reduced due to low supply voltage
Solution Approach 2:
The reset circuit performs preliminary action by setting input nodes and internal nodes to predetermined voltage levels based on the sensed core supply voltage condition. This preliminary conditioning prevents the level shifter from entering undefined states or causing indefinite current flow when the core supply voltage is insufficient for normal operation
3Device complexity
If a conventional level shifter operates during power ramp-up without external power on reset input, then circuit simplicity is maintained, but the level shifter attains undefined output states and exceeds reliability limits
Solution Approach 1:
The patent applies self-service by enabling the level shifter circuit to automatically monitor its own operating conditions through the sense circuit and self-condition its input nodes and internal nodes through the reset circuit. This self-service mechanism allows the circuit to autonomously detect when core supply voltage is below threshold and prepare appropriate voltage levels without requiring external power-on reset input, maintaining reliability during power ramp-up while adding minimal complexity
Solution Approach 2:
The reset circuit performs preliminary action during power ramp-up by detecting the core supply voltage level and setting input nodes and internal nodes to predetermined voltage levels before the level shifter operates. This preliminary conditioning ensures defined output states and prevents reliability issues during power transitions without requiring external reset signals
Data Source
AI summary
An embedded system includes a level shifter circuit for generating a forward supply voltage level in a predefined range. A sense circuit senses a core supply voltage level of the embedded system and compares the sensed core supply voltage level with a predetermined minimum core supply voltage level needed to generate the forward supply voltage. A reset circuit maintains one or more input nodes and one or more internal nodes of the level shifter circuit at a predetermined voltage level when the core supply voltage level is less than the predetermined minimum core supply voltage level.