Level Shifter Circuit for Scanning Waveform Sharpness
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As the size of display panels increases, the load on control lines in scanning circuits for organic EL display devices becomes significant, leading to a reduction in the sharpness of control pulse waveforms, which is mitigated by increasing the gate-source voltage of transistors in inverter circuits, but this can exceed the source-drain withstand voltage, reducing transistor reliability.
Innovation Solution
A level shifter circuit is designed with serially connected transistor circuits of different conductive types between fixed power sources, using double gate transistors and a switch element to apply a third fixed power source voltage to a common connection node, allowing for increased input voltage amplitude without exceeding source-drain withstand voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the size of the transistor configuring the inverter circuit is increased to reduce resistance, then the waveform sharpness is improved, but the scale of the scanning circuit increases
Solution Approach 1:
The patent changes the gate-source voltage parameter to increase the drive capability of the inverter circuit without increasing transistor size. By raising the gate-source voltage from typical levels (e.g., 5V) to higher levels (e.g., 10V or more), the transistor resistance decreases while maintaining the same physical dimensions, thus improving waveform sharpness without increasing circuit scale.
2Manufacturing precision
If the gate-source voltage is increased to reduce transistor resistance, then the waveform sharpness is improved, but the source-drain voltage may exceed the withstand voltage
Solution Approach 1:
The patent segments the voltage application by introducing a level shifter circuit between the control circuit and the inverter circuit. The level shifter selectively applies different voltage levels: it provides a first voltage level (e.g., 5V) during normal operation and a second, higher voltage level (e.g., 10V or more) only when needed to reduce resistance, thereby improving waveform sharpness without continuously exposing the transistor to excessive voltage that would compromise reliability.
Solution Approach 2:
The patent makes the voltage supply dynamic rather than static. The level shifter circuit dynamically adjusts the gate-source voltage based on operational requirements, transitioning between lower safe voltage levels and higher effective voltage levels. This dynamic voltage adjustment allows the system to optimize performance when needed while maintaining safety and reliability during normal operation.
Data Source
AI summary
A level shifter circuit, wherein a first and a second transistor circuit are connected serially, a third and a fourth transistor circuit are connected serially; a first input voltage is applied to the second transistor circuit and a second input voltage is applied to the fourth transistor circuit; an input terminal of the first transistor circuit is connected to an output terminal of the third and the fourth transistor circuits, and an input terminal of the third transistor circuit is connected to an output terminal of the first and the second transistor circuits; two transistor circuits of at least one side of two transistor circuits of a first fixed power source side and two transistor circuits of a second fixed power source side are configured of double gate transistors; and the level shifter circuit has a switch element for applying a voltage to a common connection node.