Level Shifter Buffer Circuit for Spike Noise Suppression
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Solution Overview
Problem
Level shifter circuits experience parasitic capacitance issues that lead to high frequency spike noise and slower response speeds when transmitting signals between different electric potential systems.
Innovation Solution
A level shifter circuit design that includes a buffer circuit with an initial stage inverter and switch, which prevents charge from flowing to the power supply, thereby preventing spike noise and improving response speed, and allows for common use of power potentials to reduce circuit complexity and size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a level shifter circuit is used to transmit signals between different electric potential systems, then voltage level adjustment is achieved, but parasitic capacitance causes spike noise and slower response speed
Solution Approach 1:
The patent introduces a buffer circuit as an intermediary between the first circuit (first electric potential system) and the second circuit (second electric potential system). This buffer circuit acts as a mediator that isolates the parasitic capacitance effects from the signal transmission path, preventing charge discharge through the power supply and eliminating spike noise while maintaining fast response speed.
Solution Approach 2:
The patent divides the level shifter circuit into three separate functional blocks: a first circuit for receiving input signals, a buffer circuit for signal isolation and level adjustment, and a second circuit for generating output signals. This segmentation allows each block to be optimized independently and prevents the propagation of harmful effects between stages.
2Object-affected harmful factors
If circuit separation is increased to reduce parasitic capacitance, then spike noise is reduced, but circuit complexity and size increase
Solution Approach 1:
The buffer circuit performs multiple functions simultaneously: it provides signal isolation between different electric potential systems, adjusts voltage levels, prevents parasitic capacitance discharge, and maintains signal integrity. This multi-functionality achieves the desired electrical separation without proportionally increasing circuit complexity.
Solution Approach 2:
The buffer circuit automatically manages the isolation and level adjustment functions without requiring external control mechanisms. The circuit self-regulates the signal transmission between different potential systems, eliminating the need for additional control circuits and reducing overall complexity.
Data Source
AI summary
A first circuit receives input signals of the first electric potential system which uses a first high potential and a first low potential as the power supply electric potential, and outputs a first signal which is a signal of the first electric potential system, a second circuit which generates output signals according to the input signal of the second electric potential system which uses as the power supply electric potential a second high potential of the first electric potential system, wherein the second circuit includes an initial stage inverter that receives the second signals and outputs third signals, and an initial stage switch that switches between connecting and disconnecting the initial stage inverter and a power supply that supplies the second high potential or a power supply that supplies the second low potential based on the first signals, and generates the output signals based on the third signals.