Level Shifter for SRAM Wordline Voltage Boosting

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Solution Overview

Problem

Static Random Access Memory (SRAM) designs face stability issues due to statistical variations in process parameters, leading to unbalanced SRAM cells and performance degradation as technology advances, with separate power supplies causing leakage and malfunctioning at voltage boundaries.

Innovation Solution

A level shifter is introduced between circuits powered by different supply voltages to selectively choose a supply voltage output based on input signals, balancing performance and power consumption by maintaining a consistent gate-to-source voltage differential and reducing leakage current.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If separate power supplies with different potentials are used to boost SRAM performance, then SRAM stability and speed improve, but leakage current and circuit malfunction increase at voltage boundaries

Engineering Contradiction:
ImproveSRAM stabilityVSAvoidleakage current
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

A level shifter circuit is introduced as an intermediary between circuits operating at different voltage potentials (VDD and VCS). The level shifter includes transistors configured to translate signals between the first supply voltage domain and the second supply voltage domain, enabling proper signal level translation while preventing direct interaction between the different voltage domains that would cause leakage and malfunction.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If separate power supplies with different potentials are used to boost SRAM performance, then SRAM speed improves, but circuit malfunction increases at voltage boundaries

Engineering Contradiction:
ImproveSRAM speedVSAvoidcircuit functionality
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The level shifter serves as a mediator between the first circuits operating at VDD and the second circuits operating at VCS. It includes a first transistor with gate connected to a first signal and source/drain connected to output nodes, and a second transistor with gate connected to a second signal and source/drain connected to the output nodes, enabling proper signal level translation while preventing direct interaction between the different voltage domains that would cause leakage and malfunction.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Length of moving object

If feature size is reduced to advance technology, then device scaling improves, but SRAM cell current becomes weaker and performance degrades

Engineering Contradiction:
Improvefeature sizeVSAvoidSRAM cell current
Core Design Contradiction:
Length of moving objectVSPower

Solution Approach 1:

The patent changes the voltage parameter by introducing a second supply voltage VCS that is higher than the first supply voltage VDD. The wordline driver circuit is configured to output a wordline signal with voltage levels selected from {VDD, VCS}, enabling voltage boosting to compensate for the weaker current in scaled devices and maintain performance despite reduced feature size.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS7710796B2Level shifter for boosting wordline voltage and memory cell performance
Publication Date: 2010.05.04 GLOBALFOUNDRIES US INC
  • US7710796B2 patent drawing
  • US7710796B2 patent drawing
  • US7710796B2 patent drawing

AI summary

A circuit and method includes first circuits powered by a first supply voltage and second circuits powered by a second supply voltage. A level shifter is coupled between the first circuits and the second circuits. The level shifter is configured to select a supply voltage output for a circuit including one of the first supply voltage and the second supply voltage in accordance an input signal, where the input signal depends on at least one of an operation to be performed and component performing the operation.