Level-Shifter Drive Circuit for Faster High-Frequency Switching
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Solution Overview
Problem
Existing semiconductor devices with high-frequency switches face delays in ON/OFF switching due to insufficient driving power from the power supply circuit, leading to prolonged transition times.
Innovation Solution
The semiconductor device employs a two-step voltage supply mechanism, first using external power (VDD or GND) followed by internal power (Vp or Vn) to quickly switch the high-frequency switch between ON and OFF states, utilizing p-channel and n-channel MOS transistors, buffers, and diodes to manage voltage transitions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single power supply voltage is used to control the high-frequency switch, then the circuit structure is simple, but the switching speed is slow due to insufficient driving power
Solution Approach 1:
The power supply voltage is segmented into two distinct stages: a first power supply voltage (VDD/GND) applied through the third transistor for initial switching, and a second power supply voltage (Vp/Vn) applied through the first transistor for final switching. This segmentation allows each stage to contribute differently to the switching process, with the first stage providing initial drive and the second stage providing enhanced driving power for rapid completion of the switching action, thereby resolving the contradiction between circuit simplicity and switching speed.
2Device complexity
If the power supply circuit provides insufficient driving power, then the circuit design is simple, but the transition time is prolonged
Solution Approach 1:
The third transistor is activated in advance to apply the first power supply voltage to the switch terminal before the first transistor applies the second power supply voltage. This preliminary action prepares the switching element by establishing an initial voltage state, reducing the workload for the subsequent high-power switching stage, and enabling faster overall transition by pre-positioning the circuit in a favorable state for rapid switching.
3Loss of time
If a two-step voltage supply mechanism is used, then the switching time is reduced, but the device complexity increases
Solution Approach 1:
The control signals for both the third transistor (first power supply) and the first transistor (second power supply) are generated from a single control signal through a control circuit that produces complementary first and second control signals. This merging of control functions allows the two-step voltage supply mechanism to be coordinated by a unified control source, reducing the overall system complexity while maintaining the benefits of staged power supply for fast switching.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces the switching time of high-frequency switches by avoiding delays caused by insufficient power supply, ensuring rapid transitions without voltage fluctuations.
Implementation Method 1
a first transistor configured to be supplied with a first voltage higher than a power supply voltage and to supply the first voltage to a first terminal
Implementation Method 2
a second transistor configured to be supplied with a second voltage lower than a ground voltage and to supply the second voltage to the first terminal
Implementation Method 3
a third transistor configured to be supplied with the power supply voltage and to supply the power supply voltage to the first terminal
Implementation Method 4
a fourth transistor configured to be supplied with the ground voltage and to supply the ground voltage to the first terminal
Data Source
AI summary
According to one embodiment, a semiconductor device includes a first transistor, a second transistor, a third transistor, a fourth transistor, a first level shifter, and a second level shifter. At a time of outputting a first voltage from a first terminal, a power supply voltage is supplied to the first terminal from the third transistor in accordance with a fourth signal output from the second level shifter, and then the first voltage is supplied to the first terminal from the first transistor in accordance with a second signal output from the first level shifter. At a time of outputting a second voltage from the first terminal, a ground voltage is supplied to the first terminal from the fourth transistor in accordance with the second signal, and then the second voltage is supplied to the first terminal from the second transistor in accordance with the fourth signal.