Level Shifter Latch Circuit for Symmetric Outputs
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Solution Overview
Problem
Level shifter circuits lack a latch function, resulting in asymmetric output signals and power consumption issues due to short circuits caused by cross-coupled transistors, leading to malfunctions and overheating.
Innovation Solution
A level shifter circuit incorporating a cross-coupled latch and a set-reset latch, with switches controlled by control signals to produce symmetric output signals and prevent short circuits, reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a traditional level shifter circuit is used, then the circuit can interface different voltage levels, but the output signals are asymmetric causing malfunction of cascaded circuits
Solution Approach 1:
The patent combines a cross-coupled latch structure with a set-reset latch structure to form an integrated level shifter circuit. The cross-coupled latch (first latch) receives level-shifted signals and transfers them to the set-reset latch (second latch), which generates symmetric output signals. This merging of two latch mechanisms resolves the signal asymmetry issue while maintaining circuit functionality.
2Power
If cross-coupled transistors are used in the level shifter circuit, then the circuit can provide level shifting function, but short circuit issues occur causing high power consumption and overheat
Solution Approach 1:
The patent introduces control signals and switching mechanisms as intermediaries between the cross-coupled latch and set-reset latch. These control signals regulate the operation of cross-coupled transistors, ensuring they switch properly and preventing simultaneous conduction that would cause short circuits. This intermediary control resolves the short circuit issue while preserving the level shifting capability.
Data Source
AI summary
A level shifter circuit which includes a cross-coupled latch and a set-reset latch is introduced. The level shifter circuit includes a first input node, a second input node and a plurality of switches. The first input node and the second input node are configured to receive a first digital input signal and a second digital input signal, respectively. The plurality of switches are configured to be switched on or off according to at least one control signal to output a first output signal and a second output signal. The set-reset latch is coupled to the cross-coupled latch and includes a set input node, a reset input node and an output node. The set input node and the reset input node are configured to receive the first output signal and the second output signal of the cross-coupled latch, respectively. The output node outputs a level-shifted output signal according to the first output signal and the second output signal of the cross-coupled latch. A method adapted to a level shifter circuit is also introduced.