Level Shifter Circuit Topology for Lower Transistor Voltage Stress
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Solution Overview
Problem
Existing level shifters face challenges in reducing transistor deterioration and minimizing voltage differences between gate and source/drain terminals, leading to reliability issues due to hot carrier injection, time-dependent dielectric breakdown, and bias temperature instability.
Innovation Solution
A level shifter design that includes a first circuit to pull down output nodes based on input signals and a second circuit to pull up output nodes to a supply voltage, using transistors connected in specific configurations to control current paths differently for input and inverted input signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a conventional level shifter uses a single path to pull up the output voltage level in response to an input signal, then the circuit structure is simple, but transistor deterioration occurs due to large voltage differences between gate terminals and source/drain terminals
Solution Approach 1:
The patent divides the single pull-up path into two separate paths: a first path for pulling up the output voltage level in response to an input signal, and a second path for controlling transistors in response to an inverted input signal. This segmentation allows independent optimization of each path to reduce voltage stress on transistors while maintaining circuit functionality.
Solution Approach 2:
The patent introduces an inverted input signal as an intermediary control mechanism. By using the inverted signal to control transistor switching through the second path, the design reduces direct voltage differences between gate and source/drain terminals, thereby mitigating hot carrier injection and other deterioration mechanisms.
2Device complexity
If a conventional level shifter uses the same path for both pulling up the output voltage and controlling transistors, then the circuit is simple, but voltage differences between gate terminals and source/drain terminals increase causing reliability issues
Solution Approach 1:
The patent segments the control functions into two distinct paths: the first path handles output voltage level pulling up, while the second path handles transistor control through inverted input signals. This separation enables independent optimization of voltage stress management for each function.
Solution Approach 2:
The patent uses the inverted input signal to drive the second path that controls transistor switching. This inversion strategy allows the control path to operate with reduced voltage differences compared to the direct input signal path, thereby improving transistor reliability while maintaining functional correctness.
3Reliability
If a level shifter uses distinct paths for pulling up output voltage and controlling transistors, then transistor deterioration is reduced, but the circuit complexity increases
Solution Approach 1:
The patent designs the first and second paths to share common circuit elements and nodes where possible. The output nodes and transistor configurations serve dual purposes: the first path achieves voltage level conversion while the second path simultaneously controls transistor states, reducing the overall component count despite the functional segmentation.
Solution Approach 2:
The patent merges the control logic by using the inverted input signal to coordinate both paths. The same inverted signal that controls the second path also indirectly influences the first path through node coupling, reducing the need for completely separate control circuits and minimizing overall complexity.
Data Source
AI summary
A level shifter includes a first circuit that pulls down a first output node and a first intermediate node based on an input signal, and pulls down a second output node and a second intermediate node based on an inverted input signal of the input signal, and a second circuit that pulls up the second output node based on the first intermediate node when the first circuit pulls down the first output node to a supply voltage, and pulls up the first output node based on the second intermediate node to the supply voltage when the first circuit pulls down the second output node.