Level-Shifting Input Buffer for High-Voltage CMOS Signals

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Solution Overview

Problem

Advanced CMOS processes limit the manufacturing of high voltage devices, leading to issues with MOS transistors receiving high voltage signals from peripheral components, causing leakage currents and increased power consumption in portable devices.

Innovation Solution

An input buffer circuit with a level shifting mechanism that uses a capacitor to generate a buffer signal between high input signal levels and lower supply voltages, preventing direct leakage currents and incorporating transistors manufactured by advanced CMOS processes to manage voltage differences within safe breakdown limits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If MOS transistors are designed to work with lower supply voltages to save power, then power consumption is reduced, but the transistors cannot handle high voltage signals from peripheral components

Engineering Contradiction:
Improvepower consumptionVSAvoidvoltage compatibility
Core Design Contradiction:
Use of energy by moving objectVSAdaptability or versatility

Solution Approach 1:

An input buffer circuit is introduced as an intermediary component between high-voltage peripheral components and low-voltage internal circuits. The buffer receives high-voltage signals from peripheral components, converts them to appropriate voltage levels, and outputs them to internal circuits, thereby enabling voltage compatibility without requiring internal circuits to operate at high voltages.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If previous input buffer circuits are used to convert high voltage levels to lower levels, then voltage conversion is achieved, but leakage currents occur which increase power consumption

Engineering Contradiction:
Improvevoltage conversion capabilityVSAvoidpower consumption
Core Design Contradiction:
Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The input buffer circuit employs dynamic control of transistor switching states based on the input signal voltage level. When a high-level input signal is detected, the circuit dynamically adjusts transistor configurations to block leakage current paths. This dynamic adaptation allows the circuit to maintain voltage conversion capability while minimizing power consumption by eliminating leakage currents under specific operating conditions.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8723581B1Input buffers
Publication Date: 2014.05.13 VIA TECH INC
  • US8723581B1 patent drawing
  • US8723581B1 patent drawing
  • US8723581B1 patent drawing

AI summary

An input buffer is provided. The input buffer receives an input signal through an input terminal and outputs an output signal at an output terminal. The input circuit includes an input circuit and a level shifting circuit. The input circuit receives the input signal and generates a buffer signal according to the input signal. The level shifting circuit receives a first supply voltage and the buffer signal and generates the output signal at the output terminal according to the buffer signal and the first supply voltage. The first high level of the input signal is higher than a voltage level of the first supply voltage. When the input signal is at a first high level, the input circuit generates the buffer signal whose voltage level is between the first high level of the input signal and the voltage level of the first supply voltage.