Level-Shifting Multiplexer for High-Speed Power Domain Crossing
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Solution Overview
Problem
Existing level-shifter multiplexer circuits face challenges in high data rate operations due to power domain boundary crossings, which reduce data reading speed and increase circuit area when separate level shifters are used for each storage device.
Innovation Solution
A level-shifting multiplexer that integrates level shifting and multiplexing functions, using pull-up and pull-down circuits with select signals to manage node states and enable efficient signal crossing between power domains, reducing the need for separate level shifters and mitigating timing issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate level shifters are used for each storage device to facilitate communication between different power domains, then signal level shifting is achieved, but circuit area increases and data reading speed decreases due to timing issues
Solution Approach 1:
The patent combines the level shifter and multiplexer into a single integrated circuit block. The multiplexer selects signals from multiple storage devices and simultaneously performs level shifting for power domain boundary crossing. This merging eliminates the need for separate level shifter circuits for each storage device, thereby reducing overall circuit area while maintaining the required signal level shifting capability.
Solution Approach 2:
The integrated circuit performs multiple functions: signal selection from multiple inputs and voltage level shifting for power domain communication. By making the circuit universal (capable of both multiplexing and level shifting), it replaces what would otherwise require separate dedicated circuits, thus reducing area without sacrificing functionality.
2Reliability
If separate level shifters are used for each storage device, then signal level shifting is achieved, but data reading speed decreases due to power domain boundary crossings
Solution Approach 1:
The patent combines the level shifter and multiplexer into a single integrated circuit block. The multiplexer selects signals from multiple storage devices and simultaneously performs level shifting for power domain boundary crossing. This merging eliminates the need for separate level shifter circuits for each storage device, thereby reducing overall circuit area while maintaining the required signal level shifting capability.
Solution Approach 2:
The level shifting operation is performed in advance as part of the signal selection process within the integrated circuit, before the signal needs to cross the power domain boundary. This preliminary action ensures that level shifting is completed efficiently without adding delay to the data reading operation.
3Area of stationary object
If an integrated level-shifting multiplexer is used, then circuit area is reduced and data reading speed is enhanced, but the circuit must handle wider range of supply voltages
Solution Approach 1:
The patent employs a multiplexing choke circuit that can adapt to different supply voltage conditions. The choke circuit is designed to function across a wide range of supply voltages, allowing the integrated level-shifting multiplexer to operate in different power domain configurations. This parameter adaptability enables the circuit to handle the wider voltage range requirement while maintaining area efficiency.
Data Source
AI summary
Systems and methods for level-shifting multiplexing are described herein. In one embodiment, a method for level-shifting multiplexing comprises selecting one of a plurality of inputs based on one or more select signals, and pulling down one of first and second nodes based on a logic state of the selected one of the plurality of inputs. The method also comprises pulling up the first node if the second node is pulled down, and pulling up the second node if the first node is pulled down.