Level Shifting Write Driver for Memory Arrays
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Solution Overview
Problem
Computing systems face challenges in efficiently driving level shifted write data due to limited on-die area and power consumption constraints, particularly in mobile devices, where larger memory arrays and increased software applications demand more bit cells while design requirements limit bit cell numbers.
Innovation Solution
The implementation of level-shifting write drivers that use a lower supply voltage for redundancy logic to shift write data and mask data, generating intermediate signals to drive output nodes with complementary values, allowing efficient write operations while minimizing power consumption and on-die area by using a single level shifter for multiple input signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If conventional write data level shifters and write mask level shifters are used, then level shifting function is provided, but on-die area and power consumption increase
Solution Approach 1:
The patent combines multiple level shifting functions (write data level shifting and write mask level shifting) into a single level-shifting write driver circuit. This single circuit receives both write data and write mask signals at the first supply voltage, performs level shifting to the second supply voltage, and drives the memory array, thereby reducing the total number of level shifters and on-die area required
Solution Approach 2:
The level-shifting write driver is designed as a universal circuit that handles multiple functions: it accepts write data signals, write mask signals, and write clock signals all at the first supply voltage, performs level shifting for all these signals, and drives the memory array at the second supply voltage, replacing multiple dedicated level shifter circuits
2Quantity of substance
If more bit cells are added to memory arrays, then storage capacity increases, but power consumption and noise sensitivity increase
Solution Approach 1:
The patent changes the supply voltage parameter by using a first supply voltage for the redundancy logic and input interfaces, and a second (higher) supply voltage for the memory arrays. This voltage parameter change allows efficient driving of memory arrays with reduced power consumption while maintaining the required storage capacity
3Use of energy by moving object
If redundancy logic uses lower supply voltage, then power consumption is reduced, but voltage level shifting is required
Solution Approach 1:
The level-shifting write driver acts as an intermediary circuit between the low-voltage redundancy logic and the high-voltage memory arrays. It receives signals at the first supply voltage, performs level shifting to the second supply voltage, and drives the memory arrays, thereby enabling voltage domain isolation and reducing power consumption without compromising functionality
Data Source
AI summary
Systems, apparatuses, and methods for efficiently driving level shifted write data are described. In various embodiments, a level-shifting write driver combines a write data bit and a write mask bit that each use a first supply voltage to indicate a logic high level. During a write operation, the driver generates complementary values on two output nodes based on the write data bit. The output nodes use a second supply voltage greater than the first supply voltage. Before a write operation, the driver precharges each of the two output nodes to the second supply voltage. When the write clock enables a write operation and the write mask bit disables the write operation, the level-shifting write driver puts the two output nodes in a tri-state.


