LFSR-Based Coverage Event Counter for Emulation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The existing methods for coverage data collection in hardware verification, such as emulation, face significant challenges due to the large number of counters required, leading to capacity and performance overhead, complex FPGA routing, and inefficient use of resources.
Innovation Solution
Implementing linear feedback shift registers (LFSR) for compact counter implementation and using an efficient counter decoding algorithm to reduce capacity and communication overhead, along with reading counter contents via FPGA scan chains to minimize routing and communication with the host computer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If separate counters are allocated for each coverage event in emulation, then coverage data collection capability is improved, but capacity overhead and performance burden increase significantly
Solution Approach 1:
Multiple coverage event counters are merged into a single counter resource in emulation. The counter is dynamically reused across different coverage events through time-multiplexing, where one counter serves multiple coverage events sequentially rather than having dedicated counters for each event. This merging approach dramatically reduces the total number of counters required while maintaining complete coverage collection capability.
Solution Approach 2:
The counter allocation is made dynamic rather than static. A single counter resource dynamically changes its function and counting target based on the current coverage event being monitored. The system dynamically configures which coverage event the counter tracks at any given time, allowing flexible adaptation to different verification phases and coverage requirements without requiring fixed dedicated counters for each event.
2Measurement precision
If millions of coverage counters are allocated in emulator hardware, then comprehensive coverage monitoring is improved, but communication overhead with host computer increases
Solution Approach 1:
The communication interface for multiple counters is merged into a single communication channel. Instead of requiring separate communication paths for each counter, the system uses one unified interface to transmit coverage data from the single reused counter to the host computer, dramatically reducing communication overhead and interface complexity.
Solution Approach 2:
The communication overhead is extracted and minimized by using a single counter interface rather than multiple independent interfaces. The system extracts only the essential coverage data through this streamlined interface, eliminating redundant communication pathways and associated overhead that would exist with millions of separate counters.
3Ease of operation
If complex FPGA routing is implemented to connect every counter with the host, then counter accessibility is improved, but device complexity and compilation time increase
Solution Approach 1:
Multiple counter-to-host routing paths are merged into a single routing path. The FPGA implementation uses one unified routing connection to interface the single reused counter with the host computer, eliminating the need for complex individual routing for each counter and significantly simplifying the overall FPGA design and compilation process.
4Adaptability or versatility
If all counters are allocated on host with signal trace collection, then counter management flexibility is improved, but simulation performance and communication efficiency deteriorate
Solution Approach 1:
The counter is configured and prepared in advance within the emulation hardware itself, rather than being managed externally on the host. The single counter is pre-configured to track the current coverage event, and its state is maintained continuously in hardware during simulation, eliminating the need for external trace collection and post-processing while maintaining management flexibility.
Data Source
AI summary
Coverage event counters for hardware verification emulations are implemented as linear feedback shift register-based counters generating encoded counter values indicative of a detected number of coverage events. To decode those counter values, a counter algorithm utilized to generate the encoded counter value may continue to be iterated after counting is complete until reaching a defined pattern, while counting the number of iterations (K) necessary to reach the defined pattern. The resulting counter value having the defined pattern is correlated with a mapping table to identify a numerical value, and an ordinal counter value indicative of the number of coverage events is determined based on the identified numerical value, less K.