LFSR Seed Value Programming for HBM Training Deskew
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Solution Overview
Problem
Conventional LFSR-based training techniques for high bandwidth memory (HBM) are inefficient due to increased training time, reduced manufacturing yields, and challenges with per-bit deskewing operations, especially as HBM speeds increase, due to power delivery noise and lane-to-lane skew issues.
Innovation Solution
Programming different seed values into multiple LFSRs to force parity bit toggling during training, which enhances training accuracy, reduces training time, and simplifies per-bit deskewing operations by mimicking expected traffic patterns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional LFSR-based training techniques are used for HBM, then training can be performed, but training time increases and manufacturing yields decrease
Solution Approach 1:
The patent applies preliminary action by pre-programming specific seed values into the LFSRs that are designed to force parity bit toggling. This preliminary configuration ensures that during training, the parity bits will toggle as expected, eliminating the need for advanced training steps and thereby reducing training time while maintaining manufacturing yields.
Solution Approach 2:
The patent changes the parameter of seed values in the LFSRs from conventional values to specifically selected values that force parity bit toggling. This parameter change transforms the training behavior to achieve both faster training speeds and maintained manufacturing yields by ensuring predictable parity bit behavior during training.
2Speed
If HBM speeds increase to achieve higher bandwidth, then data transfer performance improves, but training margins decrease due to power delivery noise and lane-to-lane skew
Solution Approach 1:
The patent uses feedback by monitoring the parity bit behavior during training and using this information to adjust the training process. By forcing parity bit toggling through specific seed values, the system gains better feedback about the actual signal quality and timing conditions, enabling more accurate training decisions even at higher speeds where noise and skew are more problematic.
Solution Approach 2:
The patent applies preliminary action by pre-configuring the LFSR seed values to force parity bit toggling before training begins. This preliminary setup ensures that the training process starts with optimal conditions for detecting and compensating for noise and skew effects, thereby maintaining training margins even as speeds increase.
3Measurement precision
If multiple training steps are implemented to improve training accuracy, then training precision improves, but training time increases
Solution Approach 1:
The patent eliminates the need for advanced training by performing preliminary configuration of LFSR seed values that force parity bit toggling. This preliminary action ensures that basic training can achieve the necessary accuracy without requiring additional advanced training steps, thereby reducing overall training time while maintaining training precision.
Solution Approach 2:
The patent changes the LFSR seed value parameters to specifically force parity bit toggling behavior. This parameter change transforms the training process to achieve sufficient accuracy in the basic training phase, eliminating the need for time-consuming advanced training steps while maintaining the required training precision.
4Manufacturing precision
If advanced training is performed to achieve accurate per-bit deskew, then deskew precision improves, but manufacturing complexity and time increase
Solution Approach 1:
The patent applies preliminary action by pre-programming seed values that force parity bit toggling, which simplifies the per-bit deskew process. This preliminary configuration ensures that the parity bits provide reliable information for deskew operations during basic training, eliminating the need for complex advanced training steps while maintaining deskew precision.
Solution Approach 2:
The patent changes the LFSR seed parameters to force specific parity bit toggling patterns that facilitate simpler per-bit deskew operations. This parameter change reduces the complexity of the training process by making the parity bits more predictable and useful for deskew, thereby achieving accurate deskew without requiring advanced training complexity.
Data Source
AI summary
Systems, apparatuses and methods may provide for technology that programs a plurality of seed values into a plurality of linear feedback shift registers (LFSRs), wherein the plurality of LFSRs correspond to a data word (DWORD) and at least two of the plurality of seed values differ from one another. The technology may also train a link coupled to the plurality of LFSRs, wherein the plurality of seed values cause a parity bit associated with the DWORD to toggle while the link is being trained. In one example, the technology also automatically selects the plurality of seed values based on one or more of an expected traffic pattern on the link (e.g., after training) or a deskew constraint associated with the link.