Lifted LDPC Code Structure for Low Error Floor and Parallel Encoding
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Solution Overview
Problem
In communications systems using LDPC codes, large accumulate structures lead to high error floors, making it difficult to achieve low error rates while maintaining simple encoding processes, especially when using cyclic lifted designs with degree two variable nodes.
Innovation Solution
Modifying accumulate structures to include higher degree variable nodes with additional edges, maintaining a dual-diagonal structure in the encoding matrices, and carefully selecting cyclic lifting values to simplify the encoding process while supporting low error floor performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If large accumulate structures with degree two variable nodes are used, then encoding simplicity is maintained, but error floor performance deteriorates
Solution Approach 1:
The patent changes the degree parameter of variable nodes from two to higher degrees (three or more) in the accumulate structure. This parameter change allows the code to achieve lower error floors while maintaining encoding simplicity through the dual-diagonal matrix structure with carefully selected cyclic lifting values.
2Reliability
If higher degree variable nodes are introduced to reduce error floor, then reliability improves, but encoding complexity increases
Solution Approach 1:
The patent carefully selects cyclic lifting values to ensure that even with higher degree variable nodes, the encoding matrix maintains a dual-diagonal structure. This structured parameter selection allows higher degree nodes to be implemented without significantly increasing encoding complexity.
Solution Approach 2:
The patent applies different degrees to different variable nodes locally within the accumulate structure. By strategically placing higher degree nodes in specific positions while maintaining the overall dual-diagonal structure, the code achieves low error floors without requiring complex encoding procedures throughout the entire structure.
3Ease of manufacture
If cyclic lifting with degree two variable nodes is used, then encoding simplicity is maintained, but parallelism capability is limited
Solution Approach 1:
The patent changes the variable node degree parameter to three or higher, which increases the number of edges connected to each variable node. This parameter change enables greater parallelism in both encoding and decoding operations while the dual-diagonal structure with carefully selected cyclic lifting values maintains encoding simplicity.
Data Source
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AI summary
A method of data encoding is disclosed. An encoder receives a set of information bits and performs an LDPC encoding operation on the set of information bits to produce a codeword based on a matched lifted LDPC code. The matched lifted LDPC code is based on a commutative lifting group and includes a number of parity bits and a submatrix to determine values of the parity bits. An order of the lifting group (Z) corresponds with a size of the lifting. The determinant of the submatrix is a polynomial of the form: ga + (g0+gL_)P, where g0 is the identity element of the group, g0 = 9L 2ˆk, and P is a n arbitrary non-zero element of a binary group ring associated to the lifting group. The matched lifted LDPC code may be based on quasi-cyclic lifting where the determinant of the submatrix is of the form xa+(1+xL)P(x), wherein P(x) has at least two terms and 2kL=0 mod Z for a positive integer k.