LIGBT P+ Buried Layer Hole Current Path Elimination
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Solution Overview
Problem
The existing LIGBT semiconductor devices suffer from latch-up issues due to a hole-current path under the N+ cathode area, leading to uncontrollable transistor operation when a parasitic NPN bipolar transistor is activated, limiting latch-up current density.
Innovation Solution
A method is introduced where a hole current is injected into the N drift region with a constant voltage applied to the P+ anode, allowing the majority of the hole current to pass through a P+ buried layer, eliminating the current path under the N+ cathode and thus preventing latch-up conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a hole current path is present under the N+ cathode area in a conventional LIGBT structure, then the device can operate with standard structure, but the latch-up current density is limited due to voltage drop across P-base resistance
Solution Approach 1:
The patent extracts and eliminates the harmful hole current path that flows under the N+ cathode through the P-base region. By removing this current path, the voltage drop across the P-base resistance is eliminated, preventing latch-up conditions and significantly increasing the latch-up current density to at least three times that of conventional devices.
2Productivity
If hole current flows through the P-base area under the N+ cathode, then current conduction is maintained, but parasitic NPN bipolar transistor activation causes uncontrollable latch-up operation
Solution Approach 1:
The patent converts the harmful effect of hole current flow through the P-base (which causes latch-up) into a beneficial configuration where holes are directed to flow through the P+ buried layer instead. This redirection eliminates the activation of the parasitic NPN bipolar transistor while maintaining necessary current conduction, ensuring reliable transistor operation.
3Device complexity
If the P-base area conducts hole current, then the device structure remains simple, but the voltage drop limits the maximum usable current density
Solution Approach 1:
The patent applies local quality by creating a specialized P+ buried layer region with high impurity concentration specifically positioned to conduct hole current. This localized modification allows the majority of holes to flow through the low-resistance P+ buried layer path rather than through the higher-resistance P-base, increasing latch-up current density while maintaining overall structural simplicity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly increases latch-up current density by eliminating the voltage drop associated with the P-base resistance, enabling at least three times the current density of the related art devices.
Implementation Method 1
a majority of the hole current passes through a P+ cathode of the lateral insulated gate bipolar transistor via a P+ buried layer
Data Source
AI summary
A method for manufacturing a semiconductor device includes steps of injecting a hole current into an N drift region while a constant voltage is applied to a P+ anode of a lateral insulated gate bipolar transistor, such that a majority of the hole current passes through a P+ cathode of the lateral insulated gate bipolar transistor via a P+ buried layer. Therefore, a hole-current path located under an N+ cathode area of a LIGBT structure is eliminated, thus securing sufficient latch-up current density.