Light Detector Trench Insulation for Edge Breakdown Suppression
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Solution Overview
Problem
In light detection devices with miniaturized semiconductor substrates, the proximity of the insulating film to the N+ type semiconductor region leads to a strong electric field at their interface, increasing the likelihood of edge breakdown due to reverse bias voltage.
Innovation Solution
A light detection device with a lattice-shaped first and second trench structure on the semiconductor substrate, where the insulating film includes regions with varying dielectric constants, specifically a lower dielectric constant region at the interface to minimize the distance between the N+ type semiconductor region and the anode electrode, thereby relaxing the electric field.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the distance between the insulating film and the N+ type semiconductor region is reduced for miniaturization, then the device size is reduced, but the electric field at the interface becomes strong and edge breakdown is likely to occur
Solution Approach 1:
The insulating film is divided into two regions with different dielectric constants: a first region with a first dielectric constant and a second region with a second dielectric constant that is smaller than the first. This local differentiation of material properties allows the interface region to have lower electric field strength while maintaining overall device miniaturization.
Solution Approach 2:
The dielectric constant parameter of the insulating film is changed spatially by introducing a second region with a lower dielectric constant than the first region. This parameter change reduces the electric field strength at the critical interface between the insulating film and the N+ type semiconductor region, preventing edge breakdown while maintaining small device dimensions.
2Reliability
If the distance between the anode contact and the cathode contact is increased to relax the electric field, then edge breakdown is suppressed, but the device size increases
Solution Approach 1:
The insulating film structure with two regions of different dielectric constants creates a localized electric field management solution at the interface region. This allows effective electric field relaxation without requiring increased overall device dimensions or larger contact spacing.
Solution Approach 2:
By changing the dielectric constant parameter in the second region of the insulating film, the electric field distribution is optimized locally. This enables reliable operation with suppressed edge breakdown while maintaining compact device size, eliminating the need to increase the distance between anode and cathode contacts.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively suppresses edge breakdown while maintaining light detection efficiency by reducing the electric field at the interface and allowing for a larger amplification region without increasing the device size.
Implementation Method 1
the insulating film includes at least a first region and a second region, the second region is a region including a portion whose depth from the first surface is located at a depth at which a distance between the third semiconductor region and the first electrode is minimized, and a dielectric constant of the second region is lower than a dielectric constant of the first region
Implementation Method 2
a photoelectric conversion region provided in an element region obtained by partitioning the semiconductor substrate by the first and second trenches, the photoelectric conversion region photoelectrically converting incident light to generate a charge
Data Source
AI summary
A light detection device capable of relaxing an electric field at an interface between an insulating film and a semiconductor substrate. The present technology includes a semiconductor substrate, a first trench and a second trench each having a lattice shape and provided on a first surface of the semiconductor substrate, an insulating film covering inner side surfaces of the first and second trenches and the first surface, an anode electrode embedded in the first trench, P type, P+ type, and N+ type semiconductor regions, a cathode contact in an element region, and a cathode electrode. The insulating film includes at least a first region and a second region. The second region includes a portion at a depth at which a distance between a third semiconductor region and a first electrode is minimized. A dielectric constant of the second region is lower than a dielectric constant of the first region.


