Light-Emitting Display TFT Structure for Low-Leakage Manufacturing
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Solution Overview
Problem
The manufacturing process of thin-film transistors (TFTs) in light-emitting display devices is complicated due to the need for separate processes for polycrystalline and oxide semiconductor patterns, leading to increased complexity and potential leakage currents, especially in devices displaying still images, which increases power consumption.
Innovation Solution
Incorporating an insulating layer between semiconductor patterns of different types of TFTs and positioning gate electrodes and source/drain electrodes on the same layer, along with blocking layers below TFTs, to simplify the manufacturing process and enhance stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If separate manufacturing processes are used for polycrystalline and oxide semiconductor patterns, then manufacturing precision can be maintained for each pattern type, but device complexity and process complexity increase
Solution Approach 1:
The patent merges the manufacturing processes for polycrystalline and oxide semiconductor patterns into a unified process. By forming both semiconductor patterns simultaneously using the same deposition and annealing steps, the patent reduces process complexity while maintaining manufacturing precision through consistent process conditions for both pattern types
Solution Approach 2:
The patent creates a universal manufacturing process that can handle both polycrystalline and oxide semiconductor patterns. The same process steps (deposition, annealing, patterning) serve multiple functions by producing different semiconductor pattern types, eliminating the need for separate dedicated processes for each pattern type
2Reliability
If separate manufacturing processes are used for different semiconductor patterns, then each pattern can be optimized, but the number of manufacturing steps increases
Solution Approach 1:
The patent combines multiple manufacturing steps into integrated process sequences. By forming both polycrystalline and oxide semiconductor patterns in the same deposition and annealing cycles, the patent reduces the total number of manufacturing steps while maintaining the ability to optimize each pattern type through controlled process parameters
3Reliability
If TFTs with different semiconductor patterns are used, then device performance can be optimized, but leakage current increases in still image display
Solution Approach 1:
The patent applies local quality by using oxide semiconductor patterns specifically in regions where low leakage current is critical (such as switching TFTs for still image display), while using polycrystalline semiconductor patterns in regions requiring high mobility. This localized material selection optimizes device performance while minimizing leakage current in specific functional areas
Solution Approach 2:
The patent employs composite material structures by integrating both oxide and polycrystalline semiconductor patterns within the same device architecture. This composite approach allows the device to leverage the low-leakage properties of oxide semiconductors and the high-mobility properties of polycrystalline semiconductors, achieving both performance optimization and leakage reduction
Data Source
AI summary
The present disclosure provides a light-emitting display apparatus including a substrate including a first region and a second region, a first thin-film transistor (TFT) disposed in the first region of the substrate and including a first semiconductor pattern, a first gate electrode, a first source electrode, and a first drain electrode, a second TFT disposed in the second region of the substrate and including a second semiconductor pattern, a second gate electrode, a second source electrode, and a second drain electrode, at least one insulating layer between the first semiconductor pattern and the second semiconductor pattern, a first blocking layer below the first semiconductor pattern, and a second blocking layer below the second semiconductor pattern.