Light-Emitting Substrate With Dummy Pins for Reflow and ESD
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Solution Overview
Problem
Existing light-emitting substrates with single-layer wiring face issues with uneven stress distribution during reflow soldering, leading to poor soldering and reduced electrostatic discharge (ESD) capability, which can damage internal circuits.
Innovation Solution
The light-emitting substrate design includes a flexible substrate with driver chips having dummy pins connected to conductive patterns, ensuring even stress distribution and improved ESD performance by routing static electricity away from vulnerable pins.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If driver chips are mounted on a flexible substrate with single-layer wiring, then device complexity is reduced, but stress distribution becomes uneven during reflow soldering leading to poor soldering quality
Solution Approach 1:
The patent transitions from single-layer wiring to multi-layer wiring structure, adding a vertical dimension to the conductive path design. This allows stress distribution to be optimized across multiple layers during reflow soldering, resolving the contradiction between simplified device structure and soldering quality.
Solution Approach 2:
The patent introduces dummy pins at specific locations on the driver chips, creating localized structural features that modify stress distribution patterns. These dummy pins are strategically placed to enhance stress uniformity in critical soldering regions without adding overall device complexity.
2Ease of manufacture
If driver chips are mounted on a flexible substrate with single-layer wiring, then ease of manufacture is improved, but electrostatic discharge capability is reduced leading to circuit damage
Solution Approach 1:
The multi-layer wiring structure provides additional dimensional pathways for electrostatic discharge. The vertical stacking of conductive layers creates multiple parallel discharge routes, enhancing ESD capability while maintaining ease of manufacture through standard multi-layer PCB fabrication techniques.
Solution Approach 2:
The dummy pins act as intermediary elements that facilitate electrostatic discharge. These additional pins provide dedicated pathways for ESD current to flow safely away from sensitive circuit regions, protecting the driver chip without complicating the manufacturing process.
3Reliability
If dummy pins are added to driver chips and connected to conductive patterns, then stress distribution becomes even and ESD capability improves, but device complexity increases
Solution Approach 1:
The dummy pins serve multiple functions simultaneously: they improve stress distribution during reflow soldering, provide electrostatic discharge pathways, and maintain electrical signal integrity. This multi-functionality justifies the increased pin count by delivering multiple reliability benefits from a single structural modification.
Solution Approach 2:
The patent modifies the pin configuration parameters of the driver chips by adding dummy pins with specific electrical connections. This parameter change optimizes both mechanical stress distribution and electrical ESD protection, achieving improved reliability through controlled structural modification.
Data Source
AI summary
A light-emitting substrate having a functional area and a bonding area spaced apart in a first direction; the light-emitting substrate includes: a substrate, a plurality of driver chips located on the substrate and located in the functional area, and a plurality of conductive patterns located between the substrate and the plurality of driver chips. The plurality of driver chips include a plurality of first driver chips and a plurality of second driver chips; among the plurality of first driver chips, at least one first driver chip is located on at least one side of the plurality of second driver chips in the first direction. The first driver chip includes at least one dummy pin. A conductive pattern is electrically connected to a dummy pin.