Light-Emitting Element Reflection Layer Groove Design
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing light-emitting elements face challenges in maximizing light extraction efficiency due to the presence of reflection layers on both the light-extracting and lateral surfaces of semiconductor stacks, which can lead to reduced light output, especially in smaller device sizes.
Innovation Solution
A method of manufacturing light-emitting elements involving a semiconductor stack with a reflection layer only on the surface opposite the light-extracting surface and no reflection layer on the lateral surface, utilizing a dielectric multilayer film for the reflection layer and a groove formation between element areas to enhance light extraction efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Illumination intensity
If a reflection layer is formed on both the light-extracting surface and lateral surface of the semiconductor stack, then light extraction efficiency is improved, but light output is reduced due to excessive reflection and absorption
Solution Approach 1:
The patent applies different surface treatments to different locations of the semiconductor stack. The light-extracting surface (top surface) is equipped with a reflection layer to enhance light extraction efficiency, while the lateral surface is intentionally left without a reflection layer to reduce light absorption and improve light output. This local differentiation resolves the contradiction by optimizing each surface's function according to its specific role in light emission and extraction.
2Illumination intensity
If a reflection layer is formed on the lateral surface of the semiconductor stack, then light extraction efficiency is improved, but device complexity increases due to additional manufacturing steps
Solution Approach 1:
The patent extracts the reflection layer from the lateral surface of the semiconductor stack, retaining it only on the light-extracting surface. By removing the unnecessary reflection layer from the lateral surface, the manufacturing process is simplified while maintaining optimal light extraction efficiency. This extraction approach resolves the contradiction by eliminating redundant structures that would complicate manufacturing.
3Area of moving object
If the semiconductor stack size is reduced to 100 μm or less, then device integration density is improved, but light output is reduced due to increased relative absorption
Solution Approach 1:
For miniaturized semiconductor stacks of 100 μm or less, the patent applies the local quality principle by differentiating the treatment between the top surface and lateral surface. The top surface retains the reflection layer for efficient light extraction, while the lateral surface is left untreated to minimize light absorption. This approach is particularly effective for small devices where the ratio of lateral surface area to total surface area increases, making lateral surface absorption a significant factor in light output reduction.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach increases light extraction efficiency by directing light primarily through the light-extracting surface and reducing absorption, particularly effective in smaller light-emitting elements with dimensions of 100 μm or less, where the absence of a reflection layer on the lateral surface enhances light output.
Implementation Method 1
forming a first reflection layer contiguously on or above (i) the second semiconductor layer in the plurality of element areas
Data Source
AI summary
A method of manufacturing light-emitting elements includes: providing a wafer comprising a semiconductor stack that comprises: a first semiconductor layer, an active layer on the first semiconductor layer, and a second semiconductor layer on the active layer, wherein the semiconductor stack comprises a plurality of mutually isolated element areas each comprising a part of the first semiconductor layer, a part of the active layer, and a part of the second semiconductor layer; forming a first reflection layer contiguously on or above (i) the second semiconductor layer in the plurality of element areas and (ii) the second semiconductor layer located between adjacent ones of the plurality of element areas; forming a plurality of first masks covering parts of the first reflection layer that are on or above the second semiconductor layer in the plurality of element areas; and forming a groove between the adjacent ones of the element areas.