Light Pipe Structures Using Low-Power Etching for Quantum Efficiency
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Solution Overview
Problem
High power etching processes for forming light pipe structures in CMOS image sensors cause damage to the semiconductor substrate, leading to increased dark current, non-uniformity of radiation reception among photodetectors, and reduced quantum efficiency due to plasma damage and electron accumulation.
Innovation Solution
A method involving low power etching and wet etching processes is used to form light pipe structures with a U-shaped etch stop layer, ensuring the bottom surface of the light pipe extends below the bottommost wiring layer, mitigating substrate damage and enhancing uniformity and quantum efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If high power etching processes are used to form light pipe structures, then the etching speed and productivity are improved, but the semiconductor substrate is damaged causing increased dark current and reduced quantum efficiency
Solution Approach 1:
The etching process is divided into multiple stages: a first etching process to remove portions of the interconnect dielectric structure, forming openings, followed by a second etching process to remove additional portions and form the light pipe structures. This segmentation allows control over etching depth and damage accumulation, preventing substrate damage while maintaining productivity.
Solution Approach 2:
The method performs preliminary etching of the interconnect dielectric structure before forming the light pipe structures. By preparing the openings and removing dielectric portions in advance, the subsequent light pipe formation process is simplified and reduces the risk of substrate damage during the main etching operation.
2Productivity
If high power etching is used to form light pipe structures, then manufacturing efficiency is improved, but plasma damage and electron accumulation occur reducing quantum efficiency
Solution Approach 1:
The etching process is segmented into controlled stages with specific purposes. The first etching process creates openings in the interconnect dielectric structure, and the second process forms the light pipe structures. This segmentation allows optimization of each stage to achieve high quantum efficiency while maintaining manufacturing efficiency.
Solution Approach 2:
The method changes etching parameters between different process stages. By adjusting power levels, gas flow rates, and exposure times for each etching stage, the process achieves both high productivity and high quantum efficiency, preventing plasma damage and electron accumulation that would reduce quantum efficiency.
3Device complexity
If conventional etching processes are used, then the process is simpler, but non-uniformity of radiation reception occurs among photodetectors
Solution Approach 1:
The etching process is divided into multiple controlled stages that systematically address different portions of the substrate. The first etching process creates uniform openings across the substrate, and the second process forms light pipe structures with controlled dimensions. This segmentation ensures uniform radiation reception among photodetectors while maintaining reasonable process complexity.
Solution Approach 2:
The method performs preliminary patterning and etching of the interconnect dielectric structure before forming the light pipe structures. This preliminary action establishes a uniform foundation that ensures consistent radiation distribution across all photodetectors, achieving manufacturing precision without excessive process complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method reduces dark current and white pixels while increasing quantum efficiency by minimizing substrate damage and ensuring uniform radiation distribution across photodetectors.
Implementation Method 1
The light pipe structures are configured to guide incident radiation to underlying photodetector by total internal reflection (TIR)
Implementation Method 2
performing a first etching process through the lower interconnect portion to define a first opening
Implementation Method 3
A method involving low power etching and wet etching processes is used to form light pipe structures
Data Source
AI summary
Various embodiments of the present disclosure are directed towards an integrated chip including an optical device within or on a semiconductor substrate. A light guide structure overlies the optical device. A first etch stop layer extends along first sidewalls and a lower surface of the light guide structure. A second etch stop layer overlies the first etch stop layer and extends along second sidewalls of the light guide structure.