Light Receiving Circuit Speed via Reverse Bias
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The existing light receiving circuits in photocouplers face limitations in operation speed due to high capacitance of MOS transistors, which hinder the increase in cut-off frequency and overall circuit speed, especially when the reverse voltage of the light receiving element is low, leading to reduced bandwidth and slower response times.
Innovation Solution
The proposed light receiving circuit incorporates a differential circuit configuration with a transimpedance amplifier and a bias circuit, utilizing a combination of MOSFETs and bipolar transistors, along with current mirror circuits and feedback resistors, to increase the reverse voltage applied to the light receiving element, thereby reducing junction capacitance and enhancing the circuit's bandwidth and speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the transconductance of the MOS transistor is increased to increase the cut-off frequency of the transimpedance amplifier, then the high speed response is improved, but the capacitance of the MOS transistor becomes large which reduces the operation speed
Solution Approach 1:
The patent changes the operating parameters of the light receiving element by applying a reverse voltage bias. This parameter change reduces the junction capacitance of the light receiving element, which in turn allows the transimpedance amplifier to achieve high cut-off frequency without requiring excessive transconductance from the MOS transistor, thus avoiding the capacitance penalty.
2Device complexity
If the reverse voltage of the light receiving element is low, then the circuit complexity is reduced, but the operation speed decreases due to higher junction capacitance
Solution Approach 1:
The patent applies a reverse voltage bias to the light receiving element, changing its operating parameter to reduce junction capacitance. This enables high-speed operation without complicating the circuit structure, as the solution is achieved through biasing rather than additional circuit components.
3Power
If the capacitance of the MOS transistor is large, then the transconductance can be high for fast response, but the switching time of the current comparator becomes long which reduces overall circuit speed
Solution Approach 1:
By changing the bias voltage parameter of the light receiving element to apply reverse voltage, the patent reduces the junction capacitance that couples into the current comparator. This reduces the switching time of the comparator without requiring excessive transconductance from the MOS transistor, thus avoiding the time penalty.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively increases the operation speed and bandwidth of the light receiving circuit, allowing for high-speed signal transmission between different power supply systems, such as DC and AC systems, by reducing junction capacitance and maintaining high transconductance.
Implementation Method 1
The light receiving element 10 converts an optical signal into a current
Implementation Method 2
The amplifier 20 includes a first transistor M1, a first feedback resistor RF1, and a second transistor M2
Data Source
AI summary
According to one embodiment, a light receiving circuit includes a light receiving element, a differential circuit, a fifth transistor, and first and second current sources. The differential circuit includes an amplifier and a bias circuit. The amplifier includes a first transistor, a second transistor, and a first feedback resistor. The amplifier is configured to convert a current from the light receiving element into a voltage. The bias circuit includes a third transistor, a fourth transistor, and a second feedback resistor. A reference voltage is supplied to a control electrode of the fourth transistor. The second and third transistors are included in a current mirror circuit. A fifth transistor has a control electrode connected to a connection point between the first and second transistors. A voltage signal switched to a high level or a low level according to a change of an optical signal is outputted.