Semiconductor Light Source Submount for Optical Coupling and Heat Dissipation

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Solution Overview

Problem

Existing semiconductor light-emitting devices face challenges in efficiently coupling emission light with optical elements while effectively dissipating heat generated by the semiconductor light-emitting chip, particularly due to the obstruction of the optical path and difficulty in precise positioning of optical elements near the emission surface.

Innovation Solution

The semiconductor light-emitting device incorporates a first submount with a spacer and a base, where the emission surface is positioned forward of the spacer's end surface, allowing efficient light coupling and heat dissipation by using insulating and conductive materials to facilitate precise optical element fixation and heat transfer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the optical element is disposed in the vicinity of the emission surface, then the coupling efficiency of emission light to optical element can be improved, but the precision of positioning becomes difficult to control

Engineering Contradiction:
Improvecoupling efficiencyVSAvoidpositioning precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent introduces a submount as an intermediary component between the semiconductor light-emitting chip and the optical element. The submount provides a separate mounting platform with positioning structures (such as positioning holes and positioning protrusions) that enable precise positioning of the optical element without interfering with the emission surface. This mediator allows the optical element to be positioned accurately while maintaining the required coupling efficiency.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Illumination intensity

If nothing is disposed on or in the vicinity of the emission surface to avoid light path obstruction, then the optical path remains clear, but heat dissipation from the vicinity of the emission surface becomes difficult

Engineering Contradiction:
Improveoptical path clarityVSAvoidheat dissipation
Core Design Contradiction:
Illumination intensityVSTemperature

Solution Approach 1:

The patent segments the device into distinct functional zones: the emission surface area is kept clear for optimal light emission, while the submount provides a separate thermal management zone with heat dissipation structures. The submount includes heat dissipation portions that can be positioned away from the optical path while still effectively conducting heat away from the semiconductor chip through thermal conduction paths.

Inventive Principle:
Principle #1Segmentation

3Reliability

If the optical element is fixed near the emission surface, then light coupling efficiency improves, but heat dissipation becomes more difficult due to spatial constraints

Engineering Contradiction:
Improvecoupling efficiencyVSAvoidheat dissipation structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The submount serves multiple functions simultaneously: it provides mechanical support for the semiconductor chip, positions the optical element with high precision, and incorporates heat dissipation structures. By making the submount a multi-functional component, the patent avoids adding separate complex structures for positioning and thermal management, thereby reducing overall device complexity while achieving both precise optical coupling and effective heat dissipation.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enables efficient coupling of emission light with optical elements and easy heat dissipation from the submount, enhancing the utilization efficiency of light and reducing interference, thereby improving the overall performance of the semiconductor light-emitting device.

Implementation Method 1

a first semiconductor light-emitting chip (30) disposed on the first submount (10) and including a first surface (30a) and a second surface (30b) on opposite sides, a first optical waveguide (WG) extending in a first direction (D1) parallel to the first surface (30a) and disposed closer to the first surface (30a) than to the second surface (30b), and a first emission surface (30F) that is one of side surfaces that connect the first surface (30a) and the second surface (30b) and intersect the first direction (D1), and emits emission light in the first direction (D1)

Methodology Applied
Scientific EffectLight emission: Light Emitting Diode

Implementation Method 2

The first submount (10) includes a first base (19) including a third surface (19a), and a spacer (11) disposed on the third surface (19a). The first semiconductor light-emitting chip (30) is bonded to the first submount (10) with the first surface (30a) facing the spacer (11)

Methodology Applied
Scientific EffectHeat conduction: Conduction (thermal)

Data Source

PatentUS12568723B2Semiconductor light-emitting device and light source device including the same
Publication Date: 2026.03.03 NUVOTON TECH CORP JAPAN
  • US12568723B2 patent drawing
  • US12568723B2 patent drawing
  • US12568723B2 patent drawing

AI summary

A semiconductor light-emitting device includes a first submount and a semiconductor light-emitting chip. The semiconductor light-emitting chip includes a first surface, a first optical waveguide extending in a first direction parallel to the first surface and disposed closer to the first surface than to a second surface, and an emission surface that emits emission light. The first submount includes a first base including a third surface, and a spacer disposed on the third surface. The semiconductor light-emitting chip is bonded to the first submount with the first surface facing the spacer. The emission surface is positioned forward of a front end surface of the spacer. A first front surface, which is the front end surface of the first base, is positioned forward of the emission surface.