Multi-Channel LIN Master Testing with UART Slave Emulation

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Solution Overview

Problem

Conventional LIN interfaces are costly and limited in channels, making it challenging to test multiple LIN channels simultaneously in automotive post-production, especially in high-noise environments, and do not support slave node functionality during master device testing.

Innovation Solution

A cost-effective testing device utilizing UART interfaces with LIN slave state machines to emulate slave node behavior, allowing multiple LIN channels to be tested simultaneously, with commercially available UART chips like the MAX14830 providing four channels per chip, and an Ethernet module for reliable data transfer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional LIN interfaces are used to test multiple LIN channels simultaneously, then testing capability is provided, but cost and device space requirements increase significantly

Engineering Contradiction:
Improvetesting capabilityVSAvoidcost
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The testing device uses a single multi-functional platform that can dynamically configure and test multiple LIN channels simultaneously. The system employs a universal test bench with reconfigurable hardware that can adapt to different LIN channel configurations, replacing the need for multiple dedicated conventional LIN interfaces. This multi-functional approach maintains full testing capability while significantly reducing overall system cost and space requirements.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The invention merges multiple LIN channel testing functions into a single integrated testing device. Instead of using separate conventional LIN interfaces for each channel, the system combines all channel testing capabilities into one unified platform that can handle multiple channels concurrently. This consolidation reduces the total number of components, lowers cost, and decreases the space occupied on the test bench.

Inventive Principle:
Principle #5Merging (Combining)

2Productivity

If conventional LIN interfaces are used to test multiple LIN channels simultaneously, then testing capability is provided, but the number of required interfaces and occupied space increase

Engineering Contradiction:
Improvetesting capabilityVSAvoidoccupied space
Core Design Contradiction:
ProductivityVSArea of stationary object

Solution Approach 1:

The invention merges multiple LIN channel testing functions into a single integrated testing device. Instead of using separate conventional LIN interfaces for each channel, the system combines all channel testing capabilities into one unified platform that can handle multiple channels concurrently. This consolidation reduces the total number of components, lowers cost, and decreases the space occupied on the test bench.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The testing device uses a single multi-functional platform that can dynamically configure and test multiple LIN channels simultaneously. The system employs a universal test bench with reconfigurable hardware that can adapt to different LIN channel configurations, replacing the need for multiple dedicated conventional LIN interfaces. This multi-functional approach maintains full testing capability while significantly reducing overall system cost and space requirements.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Productivity

If multiple conventional LIN interfaces are connected to a single computer, then multiple channels can be tested, but technical issues arise in high-noise environments

Engineering Contradiction:
Improvechannel testing capabilityVSAvoiddata transfer reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The testing device introduces an intermediary shielding and isolation layer between the LIN bus interfaces and the computer connection. This includes physical shielding of signal lines, use of isolated power supplies, and galvanic isolation circuits that prevent noise from the high-noise testing environment from affecting data transfer to the computer. The intermediary protection mechanisms ensure reliable data transfer even when multiple LIN channels are being tested simultaneously in electrically noisy conditions.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Quantity of substance

If System-On-Chip modules with multiple LIN channels are used, then channel capacity increases, but slave node functionality cannot be emulated

Engineering Contradiction:
Improvenumber of LIN channelsVSAvoidslave node emulation capability
Core Design Contradiction:
Quantity of substanceVSAdaptability or versatility

Solution Approach 1:

The testing device employs dynamic reconfigurable hardware that can change its operational mode for each LIN channel independently. The system uses programmable logic and software-controlled configuration that allows each channel to be dynamically assigned as either master or slave mode based on the specific testing requirements. This dynamic adaptability enables the same hardware platform to emulate both master and slave node behaviors across multiple channels, providing versatility that fixed-function SoC modules cannot achieve.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11374846B1Lin master testing device
Publication Date: 2022.06.28 APTIV TECHNOLOGIES AG
  • US11374846B1 patent drawing
  • US11374846B1 patent drawing
  • US11374846B1 patent drawing

AI summary

Testing device for testing a LIN master device having a plurality of LIN channels. The device has a plurality of LIN channel terminals, each for connection to a LIN bus associated with one of the LIN channels of the LIN master device. One or more UART circuits are communicatively coupled to the plurality of LIN channel terminals for receiving and transmitting signals on the respective LIN bus. A controller is communicatively coupled to the one or more UART circuits and is configured to implement a LIN slave state machine on each of the LIN busses using the one or more UART circuits for emulating LIN slave behaviour.