Line Buffer Partitioning for Multi-Plane Image Synthesis

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Solution Overview

Problem

The fixed size of line buffers in image synthesis apparatuses requires multiple buffers for simultaneous display of multiple planes, leading to increased memory costs.

Innovation Solution

Each target line buffer is divided into sections to store row pixel data of multiple planes, with configurable depths based on the planes' ratios and priorities, optimizing space utilization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If each line buffer is used to store row pixel data of one single plane, then the storage is simple and fixed, but more line buffers are required for simultaneous display of multiple planes, causing significant increase in memory cost

Engineering Contradiction:
Improvebuffer configuration simplicityVSAvoidmemory cost
Core Design Contradiction:
Ease of manufactureVSQuantity of substance

Solution Approach 1:

Each line buffer is configured to serve multiple planes simultaneously by dividing the buffer into multiple sections, where each section can store row pixel data for a different plane. This multi-functional configuration allows a single line buffer to replace multiple dedicated buffers, reducing memory cost while maintaining the ability to display multiple planes concurrently

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The line buffer is segmented into multiple sections, with each section assigned to store data for a specific plane. This segmentation enables efficient organization and management of multi-plane data within a single buffer, allowing the system to handle multiple planes without requiring separate buffers for each plane

Inventive Principle:
Principle #1Segmentation

2Device complexity

If the size of each line buffer is fixed, then the buffer design is simple, but it cannot adapt to different numbers of planes, requiring more buffers when displaying multiple planes simultaneously

Engineering Contradiction:
Improvebuffer design complexityVSAvoidmulti-plane display capability
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The line buffer configuration is made dynamic by allowing the buffer to be divided into different numbers of sections based on the number of planes that need to be displayed simultaneously. This dynamic adaptability enables the same fixed-size buffer to efficiently accommodate varying numbers of planes without requiring changes to the buffer's fundamental design or additional buffers

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS12567123B2Method for configuring buffer and image synthesis apparatus
Publication Date: 2026.03.03 REALTEK SEMICON CORP
  • US12567123B2 patent drawing
  • US12567123B2 patent drawing
  • US12567123B2 patent drawing

AI summary

A method for configuring a buffer and an image synthesis apparatus are provided. The image synthesis apparatus includes a memory, and the memory includes a plurality of line buffers. The method includes the following step: dividing, according to a plurality of depths of a plurality of target planes, each of a plurality of target line buffers into a plurality of sections for respectively storing row pixel data of the target planes. The sections correspond to the depths of the target planes, respectively.