Advanced Line Coding with Control Block Reordering for Symbol Alignment

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Solution Overview

Problem

Existing interconnection protocols, such as the UFS standard, utilize the 8b/10b coding scheme which results in inefficient data throughput and symbol alignment issues when transitioning to advanced coding schemes like 128b/130b or 128b/132b, lacking necessary symbol alignment and lock mechanisms.

Innovation Solution

Implement an advanced line encoding (ALE) scheme with improved effective data rates using 128b/130b, 128b/132b, 256b/258b, or 256b/260b coding, and reordering control PDUs to facilitate enhanced data throughput by generating control blocks with reordered PDUs and incorporating synchronization headers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If 8b/10b coding scheme is used, then DC balance is maintained, but effective data rate is reduced by 20% overhead

Engineering Contradiction:
ImproveDC balanceVSAvoideffective data rate
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent changes the coding parameters from 8b/10b (20% overhead) to 128b/130b or 128b/132b (1.56% or 1.56% overhead), significantly improving effective data rate while maintaining DC balance through modified coding schemes that incorporate synchronization headers and control block reordering

Inventive Principle:
Principle #35Parameter changes

2Productivity

If advanced coding schemes like 128b/130b or 128b/132b are used, then effective data rate is improved, but symbol alignment and lock mechanisms are lacking

Engineering Contradiction:
Improveeffective data rateVSAvoidsymbol alignment
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent incorporates synchronization headers at the beginning of control blocks that are reordered to specific positions, enabling the receiver to perform symbol alignment and lock operations in advance before data transmission, thus resolving the alignment issues of advanced coding schemes

Inventive Principle:
Principle #10Preliminary action

3Productivity

If control PDUs are reordered in control blocks, then data throughput is enhanced, but device complexity increases

Engineering Contradiction:
Improvedata throughputVSAvoidcontroller complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments control blocks into specific structures with headers and reordered control PDUs separated from data PDUs, allowing independent processing and management of control information, which simplifies the reordering logic despite the increased throughput requirements

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12574449B2Operation method for an electronic device and an electronic device capable of performing an advanced line coding
Publication Date: 2026.03.10 SK HYNIX INC
  • US12574449B2 patent drawing
  • US12574449B2 patent drawing
  • US12574449B2 patent drawing

AI summary

Electronic device and operation method for an electronic device are provided. In the electronic device, a specific number of protocol data units (PDUs) are received as a PDU block to be transmitted. The PDU block includes at least one PDU belonging to a control PDU category. A control block is generated according to the PDU block by reordering, wherein the control block includes a header being placed before all PDUs of the PDU block and indicating a control block category; in the control block, any PDU belonging to the control PDU category in the PDU block is placed after the header and before any PDU belonging to a data PDU category in the PDU block. The control block is transmitted through the electronic device to another electronic device according to an advanced line encoding having an improved effective data rate as compared to 8b/10b encoding.