Line Memory Switching for Interlaced Stereoscopic Video Resolution Conversion
Solution Overview
Problem
Existing image processing technologies face challenges in efficiently resizing interlaced stereoscopic video signals, leading to increased memory and circuit requirements, which result in higher costs and complexity.
Innovation Solution
An image processing device with horizontal and vertical resolution conversion units, line memories, and a line memory specifying unit that alternately stores and reads image data to reduce circuit scale and memory capacity, allowing for efficient resolution conversion and simplified data processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If frame memory is used to store and rearrange interlaced stereoscopic video data, then complete frame storage is achieved, but memory capacity and device cost increase significantly
Solution Approach 1:
The patent divides the frame memory into two separate line memories (first line memory and second line memory) that alternately store odd and even field data. This segmentation allows the system to process and store interlaced stereoscopic video data in smaller, manageable portions rather than requiring complete frame storage, significantly reducing memory capacity requirements while maintaining data integrity for resolution conversion operations.
2Manufacturing precision
If interlaced stereoscopic video signals are resized using conventional methods, then resolution conversion is achieved, but circuit scale and complexity increase
Solution Approach 1:
The patent employs dynamic switching between the first and second line memories based on the current processing field (odd or even). The line memory switching unit dynamically selects which line memory to read from or write to, enabling efficient processing of interlaced stereoscopic video signals without requiring complex static circuit architectures. This dynamic approach reduces circuit scale while maintaining resolution conversion accuracy.
3Quantity of substance
If line memory switching is implemented for interlaced video processing, then memory capacity is reduced, but processing continuity may be affected
Solution Approach 1:
The patent implements periodic switching between the first and second line memories in synchronization with the interlaced video field rate. The line memory switching unit alternates between storing odd fields in one line memory and even fields in the other, creating a rhythmic, periodic operation pattern. This periodic action ensures processing continuity by maintaining a predictable, synchronized workflow that prevents data loss or processing interruptions while utilizing reduced memory capacity.
Data Source
AI summary
An image processing device includes: a horizontal resolution converting unit that converts a horizontal resolution of input image data to output horizontal resolution-converted image data; a line memory for the left eye and a line memory for the right eye that store the horizontal resolution-converted image data; a line memory specifying unit that specifies the line memory to store the horizontal resolution-converted image data; a line memory reading unit that reads the horizontal resolution-converted image data from either of the line memory for the left eye and the line memory for the right eye; and a vertical resolution converting unit that converts a vertical resolution of the horizontal resolution-converted image data read by the line memory reading unit to generate output image data.