Line-Encoded Data Stream Reconfiguration for Low-Latency Switching
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Solution Overview
Problem
Existing systems for modifying line encoded data streams face challenges in minimizing latency and preventing communication errors during reconfiguration, particularly in applications requiring low latency and confidentiality, such as financial trading and gaming.
Innovation Solution
A system comprising a deserialiser, serialiser, and reconfigurable circuitry that generates and synchronizes raw parallel data streams, allowing for efficient modification of line encoded data streams by avoiding inline packet decoding logic and using trigger conditions to manage reconfiguration, thereby minimizing latency and preventing errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If inline packet decoding logic is used to modify the data stream, then filtering and modification capabilities are improved, but latency increases
Solution Approach 1:
The patent extracts the modification function from inline packet decoding logic and implements it through reconfigurable circuitry that can be triggered by specific conditions. This allows the system to avoid continuous packet decoding and only perform modifications when necessary, thereby reducing latency while maintaining filtering capability.
Solution Approach 2:
The patent employs reconfigurable circuitry that can dynamically change its configuration based on trigger conditions. This dynamic approach allows the system to switch between different processing modes (pass-through vs. modification) depending on the data stream content, optimizing performance by avoiding unnecessary processing steps.
2Adaptability or versatility
If reconfigurable circuitry is used to modify the data stream, then filtering and modification capabilities are improved, but communication errors may occur during reconfiguration
Solution Approach 1:
The patent performs synchronization of the other raw parallel data stream to the raw parallel data stream before reconfiguration occurs. This preliminary synchronization ensures that both data streams are aligned, preventing communication errors that could arise from misalignment during the reconfiguration process.
Solution Approach 2:
The patent uses a controller that monitors trigger conditions and manages reconfiguration based on the state of the data streams. This feedback mechanism ensures that reconfiguration only occurs when appropriate conditions are met, thereby maintaining reliability while enabling modification capabilities.
3Productivity
If payload decoding logic is required, then data processing capability is improved, but latency and system complexity increase
Solution Approach 1:
The patent extracts only the essential modification functionality from full payload decoding logic. By using reconfigurable circuitry triggered by specific conditions, the system achieves data processing capability without requiring complete packet decoding, thereby reducing system complexity and latency.
Data Source
AI summary
A system that receives a line encoded data stream from a source. The system has a de-serializer for de-serializing a line encoded data stream to generate a raw parallel data stream. The system has a serializer for serializing the raw parallel data stream. The system has a parallel data generator configured to generate another raw parallel data stream. The system has reconfigurable circuitry for communicating the raw parallel data stream to the serializer in a configuration and communicating the other parallel data stream in another configuration.


