Linear Code Memory Check for Low-Overhead Data Tamper Detection
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Solution Overview
Problem
Safety-related data processing systems, such as microprocessors on chip cards, face challenges in protecting against attacks and manipulations without incurring excessive costs in terms of chip area and energy consumption.
Innovation Solution
A chip with processing circuits that multiply a data vector by a processing matrix corresponding to the non-unit-matrix part of a generator matrix of a predetermined linear code, summing the results, and storing them with the data vector as a data word in memory, with a decoding circuit to check for validity and detect errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional protection methods are used against attacks and manipulations, then security is improved, but chip area requirement and energy consumption increase excessively
Solution Approach 1:
The patent changes the parameter of error detection by using a specific linear code with generator matrix G = (I | A) where A has even weight columns. This parameter change enables efficient error detection with reduced computational overhead, thereby reducing chip area and energy consumption while maintaining security protection
Solution Approach 2:
The patent extracts only the essential protection mechanism by using a dedicated error detection code with specific properties (even weight columns in generator matrix). This extracted approach focuses on detection rather than full correction, reducing the complexity and area requirements compared to conventional comprehensive protection methods
2Reliability
If conventional protection methods are used against attacks and manipulations, then security is improved, but energy consumption increases excessively
Solution Approach 1:
The patent changes the energy consumption parameter by optimizing the error detection code structure. The generator matrix with even weight columns enables simpler parity check calculations during verification, reducing the number of computational operations and thereby lowering energy consumption while maintaining protection effectiveness
Solution Approach 2:
The error detection system serves itself by using the inherent structure of the linear code (generator matrix properties) to perform automatic verification. The even weight column property enables self-verification through simple parity checks without requiring complex external validation circuits, reducing energy consumption
3Measurement precision
If error detection code is implemented with generator matrix G = (I | A) having even weight columns, then error detection capability is improved, but device complexity increases
Solution Approach 1:
The patent changes the structural parameter of the generator matrix to have even weight columns. This parameter change improves error detection capability because any single-bit error will change the parity, making detection possible. The structure simplifies the verification process to basic parity checks rather than complex matrix operations
Solution Approach 2:
The patent segments the error detection function into simple parity check operations based on the even weight column structure. Each column's even weight property creates independent parity relationships that can be verified separately, dividing the complex error detection task into simpler, more manageable operations
Data Source
AI summary
A chip is provided having processing circuits, each processing circuit configured to process a data vector to be stored according to a multiplication of the vector by a processing matrix, the sum of the processing matrices corresponding to the non-unit-matrix part of a generator matrix of a predetermined linear code in reduced form, a summing circuit to sum the results of the processing operations of the data vector, a storage circuit to store the data vector to be stored together with the sum of the generated results as one data word in a memory, a read-out circuit to read the stored data word out of the memory, and a decoding circuit to check whether the data word read out is a valid code word of the linear code and to output an error signal if the data word is not a valid code word of the linear code.