Linear Equalizer Circuit Using Self-Biased RC Networks

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Solution Overview

Problem

Conventional linear equalizers enforce more gain reduction on lower frequency components of input signals rather than providing more gain enhancement for higher frequency components, requiring additional amplification to compensate for the gain reduction.

Innovation Solution

A linear equalizer circuit design that uses a combination of PMOS and NMOS transistors in self-biased RC networks to provide higher impedance for higher frequency signals, allowing for greater gain enhancement of high frequency components without sacrificing low frequency signal gain, eliminating the need for subsequent wide-band amplifiers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If RC-degeneration network is used to provide frequency-dependent gain reduction, then equalization function is achieved, but gain of low frequency components is reduced requiring additional wide-band amplifier

Engineering Contradiction:
Improveequalization functionVSAvoidsignal gain
Core Design Contradiction:
Adaptability or versatilityVSPower

Solution Approach 1:

The patent inverts the conventional approach by using self-biased MOS transistors with RC networks to provide frequency-dependent gain enhancement instead of gain reduction. The self-biasing mechanism creates an impedance that increases with frequency, thereby boosting high-frequency components while preserving low-frequency gain, eliminating the need for additional wide-band amplifiers.

Inventive Principle:
Principle #13The other way round (Inversion)

Solution Approach 2:

The patent changes the operating parameters of MOS transistors by introducing self-biasing RC networks that dynamically adjust the transistor bias point based on frequency. This parameter change enables the transistor to provide higher impedance and gain enhancement at high frequencies while maintaining appropriate gain at low frequencies, resolving the contradiction between equalization and overall signal gain.

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If higher degree of equalization is required, then more gain reduction on low frequency component is needed, but this increases device complexity

Engineering Contradiction:
Improvedegree of equalizationVSAvoidcircuit structure
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent employs self-biased MOS transistors that automatically adjust their operating point and impedance characteristics based on the input signal frequency. The self-biasing RC networks provide frequency-dependent feedback that enables the transistor to enhance high-frequency gain without requiring external control circuits or additional amplification stages, achieving high-degree equalization while maintaining circuit simplicity.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS9082631B1Linear equalizer circuit and method thereof
Publication Date: 2015.07.14 REALTEK SEMICON CORP
  • US9082631B1 patent drawing
  • US9082631B1 patent drawing
  • US9082631B1 patent drawing

AI summary

A circuit having a first MOS transistor of a first type configured in a common-source amplifier topology for receiving an input signal and outputting an intermediate signal, a first MOS transistor of a second type configured in a self-biased topology biased via a first self-biasing RC network for providing termination for the intermediate signal, a second MOS transistor of the second type configured in a common-source amplifier topology for receiving the intermediate signal and outputting an output signal, and a second of MOS transistor of the first type configured in a self-biased topology via a second self-biasing RC network for providing termination to the output signal.