Linear Gm Cell Topology for Low-Voltage Wide-Range Operation
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Solution Overview
Problem
Conventional transconductor cells require a high supply voltage of at least 3V to maintain transconductance stability, which is challenging as supply voltages shrink, limiting their applicability in low-voltage environments.
Innovation Solution
A low-voltage, low-power transconductor cell design incorporating an emitter degenerated input stage, compression stage, Caprio circuit, and current mirror output stage, utilizing CMOS or bipolar transistors, which reduces the required supply voltage to approximately 2.4V while maintaining linearity and noise performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional transconductor cell design is used with emitter follower stage, then transconductance stability is maintained, but supply voltage requirement increases to at least 3V
Solution Approach 1:
The patent removes the input emitter follower stage from the conventional transconductor cell, extracting the problematic voltage-consuming component while maintaining transconductance stability through the modified direct coupling architecture between the input differential pair and subsequent stages
Solution Approach 2:
The patent changes the biasing parameters and voltage levels throughout the circuit to accommodate the removal of the emitter follower, adjusting the operating points of transistors and bias currents to maintain proper transistor operation and transconductance stability at the reduced 2.4V supply voltage
2Use of energy by moving object
If supply voltage is reduced to low-voltage range, then power consumption decreases, but maintaining linearity and noise performance becomes difficult
Solution Approach 1:
The patent carefully adjusts bias current parameters and transistor sizing ratios to optimize the trade-off between low voltage operation and maintaining linear performance, ensuring that transistors operate in their optimal regions despite the reduced 2.4V supply voltage
Solution Approach 2:
The patent incorporates feedback mechanisms through the modified circuit topology that automatically compensates for non-linearities and maintains consistent transconductance and noise performance across the operating range, even at the reduced voltage level
3Ease of operation
If input emitter follower stage is included, then input impedance is improved, but voltage headroom is reduced
Solution Approach 1:
The patent removes the input emitter follower stage entirely, accepting the trade-off in input impedance characteristics in exchange for gaining the necessary voltage headroom to operate reliably at the reduced 2.4V supply voltage level
Data Source
AI summary
An improved low-voltage, low-power, wide range, and linear Gm Cell is disclosed. In one embodiment, a method of linearizing output current with an input voltage using a Gm Cell includes receiving an input differential voltage by an emitter degenerated input stage and outputting a current including a linear part and a nonlinear part at signal output terminals Iout_P and Iout_M, converting the non-linear part of the output current to a voltage difference via a compression stage, converting the voltage difference to a linear output current by a linear voltage to current converter stage, outputting the linear output current using a current mirror output stage to the signal output terminals Iout_P and Iout_M, and summing the output currents of the emitter degenerated input stage and the current mirror output stage at the signal output terminals Iout_P and Iout_M to obtain a linear output current with the input differential voltage.