Linear MAC Pipelines With Rotating Accumulation Values
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing multiplier-accumulator (MAC) processing pipelines face inefficiencies in data processing due to limitations in data rotation and accumulation operations, leading to suboptimal throughput and processing speed.
Innovation Solution
The implementation of interconnected MAC circuits in serial or linear pipelines with configuration control circuitry to manage data rotation and accumulation values, allowing for efficient pipelining through interconnected MACs, where accumulation values are maintained and input data is rotated on a cycle-by-cycle basis, enhancing throughput and processing efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If accumulation values are rotated and transferred through all MACs on each execution cycle, then processing throughput is improved, but device complexity increases due to additional interconnection and control requirements
Solution Approach 1:
The patent divides the data flow into two distinct types: accumulation values that rotate through all MACs, and input data that remains stationary. This segmentation allows different data to follow different paths, simplifying the control logic while maintaining high throughput. The MAC array is also segmented into functional units (multiplier, accumulator, register) that can operate independently.
Solution Approach 2:
The patent implements preliminary action by pre-loading input data into the MAC array at the beginning of the execution sequence, then maintaining it in place throughout the cycles. This eliminates the need for continuous data rotation during processing, reducing control complexity while preserving throughput through the rotation of accumulation values instead.
2Productivity
If input data are rotated through MACs on each execution cycle, then processing efficiency is improved, but loss of time increases due to additional data transfer operations
Solution Approach 1:
Input data are loaded into the MAC array during initialization and then maintained in place throughout the execution sequence. This preliminary loading action eliminates repeated data transfer operations during processing cycles, reducing time loss while maintaining processing efficiency through the rotation of accumulation values rather than input data.
Solution Approach 2:
The patent ensures continuous useful action by rotating accumulation values through the MAC array on each execution cycle, keeping all MACs continuously occupied with productive work. Input data remain stationary in registers, eliminating idle transfer time, while accumulation values continuously flow through the pipeline maintaining processing momentum.
3Manufacturing precision
If accumulation values are maintained in each MAC during execution cycles, then manufacturing precision is improved, but device complexity increases due to additional storage requirements
Solution Approach 1:
The patent merges the storage function into the existing MAC structure by incorporating registers within each MAC that hold both input data and accumulation values. This integration eliminates the need for separate external storage arrays, reducing overall device complexity while maintaining precise accumulation value retention throughout the execution sequence.
Solution Approach 2:
The registers within each MAC serve multiple functions: storing input data, holding accumulation values, and facilitating data rotation. This multi-functionality reduces the need for separate dedicated storage components, maintaining manufacturing precision for accumulation values while minimizing additional device complexity.
Data Source
AI summary
An integrated circuit comprising a plurality MAC processors, interconnected into a linear pipeline, configurable to process input data, wherein each MAC processor includes (A) a multiplier and (B) an accumulator circuit, and (C) a plurality of rotate input data paths, wherein each rotate input data path couples two sequential MAC processors of the linear pipeline including an input of the multiplier circuit of a first MAC processor of sequential MAC processors to an input of the multiplier circuit of the immediately following MAC processor of the associated sequential MAC processors of the pipeline—wherein each rotate input data path is configurable to provide rotate input data from a first MAC processor of sequential MAC processors of the linear pipeline to the immediately following MAC processor of the associated sequential MAC processors thereby forming a serial circular path via the plurality of rotate input data paths.