Linear Memory Address Transformation for Metadata Positioning

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Solution Overview

Problem

Conventional linear memory management systems lack flexibility in metadata positioning within the linear address space, leading to performance penalties due to increased pressure on page caching, especially with the inclusion of metadata bits.

Innovation Solution

Implementing a linear memory management system that allows for flexible positioning of metadata by transforming linear addresses by removing metadata bits and replacing them with a constant value, thereby improving processor performance during task execution.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of information

If metadata bits are included in the linear address space, then information capacity is increased, but pressure on page caching increases and performance deteriorates

Engineering Contradiction:

Improvemetadata storage capacityVSAvoidprocessor performance

Core Design Contradiction:

Loss of informationVSProductivity

Solution Approach 1:

The patent segments the linear address space by identifying specific bit positions as metadata bits (e.g., bits 12-15) separate from the page number bits. This segmentation allows metadata to be extracted and stored independently in cache tags, reducing the metadata burden on page caching structures while maintaining full information capacity in the address space.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent extracts metadata bits from the linear address space and stores them separately in cache tag fields. This extraction removes the metadata burden from page caching operations, allowing the caching system to handle only the essential page number translation while metadata is managed independently, thereby improving processor performance.

Inventive Principle:

Principle #2Taking out (Extraction)

2Adaptability or versatility

If conventional linear memory management is used, then simplicity is maintained, but flexibility in metadata positioning is lost

Engineering Contradiction:

Improvemetadata positioning flexibilityVSAvoidaddress transformation complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent performs preliminary action by pre-defining specific bit positions in the linear address space as metadata bits before address translation occurs. This pre-positioning allows the system to flexibly allocate metadata to any desired bit range while maintaining a systematic approach that doesn't significantly increase transformation complexity.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent applies local quality by allowing different regions of the address space to have different characteristics - specific bit positions are designated for metadata with particular properties (such as sign extension requirements), while other bits follow conventional addressing rules. This enables flexible metadata positioning without requiring complete redesign of the address transformation system.

Inventive Principle:

Principle #3Local quality

Data Source

PatentUS10324857B2Linear memory address transformation and management

Publication Date: 2019.06.18 INTEL CORP

AI summary

A processing device including a linear address transformation circuit to determine that a metadata value stored in a portion of a linear address falls within a pre-defined metadata range. The metadata value corresponds to a plurality of metadata bits. The linear address transformation circuit to replace each of the plurality of the metadata bits with a constant value.