Linear Phase Rotators for Continuous Clock Tracking
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional clock generation circuitry for optical transceivers is complex, performs poorly, and consumes high power due to the need for two separate clock generation circuits to track receiver and transmitter clocks, and existing phase rotators have limitations in linearity and ability to handle high-speed, continuous rotation.
Innovation Solution
A highly linear phase rotator design using a single phase locked loop with N phase segments, each connected to a differential pair and compensated by a current digital-to-analog converter, applies calibration corrections to generate phase offset codes for continuous rotation, addressing non-linearity and mismatch issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional clock generation circuitry uses two separate clock generation circuits to track receiver and transmitter clocks, then clock tracking capability is improved, but device complexity increases and power consumption increases
Solution Approach 1:
The patent combines two separate clock generation circuits into a single phase-locked loop that generates both transmitter and receiver clocks simultaneously. The PLL produces a primary clock signal that is then distributed to both transmitter and receiver clock generation circuits, reducing overall system complexity while maintaining the ability to track both transmitter and receiver frequency offsets independently through separate phase rotators.
Solution Approach 2:
The single phase-locked loop serves multiple functions by generating the base clock signal for both transmitter and receiver operations. The clock generation circuit is designed to provide a universal clock source that can be differentiated and adjusted for both transmission and reception functions, eliminating the need for duplicate PLL circuits.
2Reliability
If conventional clock generation circuitry uses two separate clock generation circuits, then clock tracking capability is improved, but power consumption increases
Solution Approach 1:
By merging two separate clock generation circuits into one shared PLL, the patent reduces the total power consumption associated with maintaining two independent oscillators and control circuits. The single PLL consumes less power than two separate circuits would, while the separated phase rotators only consume power when frequency offset correction is actively applied.
Solution Approach 2:
The universal clock generation approach allows one circuit to serve both transmitter and receiver functions, reducing redundant power consumption. The single PLL provides the base clock for both functions, and power is only consumed in the phase rotation stages when actual frequency correction is needed for either transmitter or receiver.
3Adaptability or versatility
If phase rotator uses discrete phase segments, then phase rotation capability is improved, but linearity deteriorates due to segment boundaries
Solution Approach 1:
The patent transitions from static, discrete phase segment selection to a dynamic continuous phase rotation approach. The phase rotator uses a continuously variable delay line or phase shifter that can adjust phase incrementally without discrete jumps, eliminating boundary effects while maintaining full phase rotation capability through continuous control.
Solution Approach 2:
The invention changes the control parameter from discrete phase segment indices to continuous phase shift values. By using a continuously adjustable parameter instead of discrete steps, the phase rotator achieves smooth phase transitions without the linearity degradation that occurs at segment boundaries in discrete designs.
4Measurement precision
If phase rotator is designed for high-speed continuous rotation, then frequency tracking precision is improved, but device complexity increases
Solution Approach 1:
The patent replaces complex mechanical or switched-capacitor phase rotation mechanisms with a digitally controlled continuous phase shifter. This substitution uses digital signal processing techniques to achieve high-speed phase rotation without the mechanical complexity or switching artifacts of traditional approaches, enabling precise frequency tracking through digital control.
Data Source
AI summary
Described herein are apparatus and methods for highly linear phase rotators with continuous rotation. A method includes generating a first code and a second code based on a desired offset to match a first and second frequency, respectively, calibrating the first code and the second code based on first phase rotator characteristics and second phase rotator characteristics, respectively, generating first N phase offset codes and second N phase offset codes from a calibrated first and second code, respectively, wherein each phase offset code constrains functionality of the first phase rotator and the second phase rotator, respectively, associated with a phase of the input clock to a defined region of operation, rotating a clock using the first N phase offset codes and the second N phase offset codes to match the first and second frequency, respectively.