Linearized Buffer Circuit for Wideband Low-Distortion Amplifiers
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Solution Overview
Problem
Existing amplifiers face challenges in achieving high linearity and wide bandwidth while minimizing DC power consumption, as they often suffer from distortion due to parasitic capacitances and displacement currents, which are not adequately addressed by increasing buffer stage bias current.
Innovation Solution
The proposed solution involves a buffer circuit and gain circuit configuration that includes linearization transistors to reduce output impedance and circulate displacement currents, thereby reducing distortion and enhancing linearity and bandwidth, while maintaining low DC power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If buffer stage bias current is increased to reduce distortion, then linearity is improved, but DC power consumption increases
Solution Approach 1:
The amplifier is divided into distinct functional stages: a buffer stage for impedance matching and a gain stage for signal amplification. This segmentation allows each stage to be optimized independently, enabling the buffer to operate with lower bias current while maintaining linearity through the separate gain stage's contribution to overall signal conditioning.
Solution Approach 2:
A common-emitter amplifier stage is introduced as an intermediary between the buffer and the output. This intermediate stage provides voltage gain and impedance transformation, allowing the buffer to operate at low current while still achieving the required output drive capability and linearity through the combined action of all stages.
2Speed
If parasitic capacitances are reduced to improve bandwidth, then frequency response is improved, but distortion increases due to displacement currents
Solution Approach 1:
The displacement currents generated by parasitic capacitances during large-signal transitions are not merely tolerated but are actively utilized. These currents are redirected through the common-emitter stage to provide beneficial voltage swing and output drive, converting what would normally be a source of distortion into a useful component of the output signal that enhances bandwidth without sacrificing linearity.
3Speed
If buffer output impedance is reduced to improve signal transfer, then bandwidth is improved, but distortion increases due to displacement currents
Solution Approach 1:
The common-emitter amplifier stage serves as an intermediary that isolates the low-impedance buffer output from the high-impedance load. This intermediate stage provides impedance transformation, allowing the buffer to drive capacitive loads effectively while the intermediary stage manages the displacement currents to prevent distortion, thus achieving both low output impedance benefits and high linearity.
Data Source
AI summary
Apparatus and methods for buffer linearization are provided. In certain implementations, an amplifier includes a buffer circuit and a gain circuit. The buffer circuit includes a buffer transistor pair used to buffer a differential input signal to generate a differential buffered signal. Additionally, the gain circuit includes a gain transistor pair configured to amplify the buffered differential signal to generate an amplified differential signal. The buffer circuit can include a linearization transistor pair configured to decrease the buffer circuit's output impedance and to provide feedback that reduces changes in the voltage of the differential buffered signal in response to displacement currents associated with the CJC or CGD capacitances of the gain transistor pair.