Linearized Time Amplifier Circuit for Sub-Picosecond TDC Resolution
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Solution Overview
Problem
Conventional time-to-digital converters (TDCs) face limitations in achieving high resolution due to process technology constraints, with Vernier TDCs requiring long delay chains and high power consumption, and existing time amplifiers struggle with sub-picosecond resolution, poor tunability, and pulse swallowing distortion.
Innovation Solution
A linearized time amplifier circuit design incorporating an asymmetrical manipulator, pseudo-pmos inverter, and tri-state reset generator, which processes two clock signals with adjustable gain and current limiting, enabling sub-picosecond resolution without explicit capacitors and being PVT invariant.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If Vernier TDC with two delay chains is used to achieve sub-gate resolution, then time resolution is improved, but area increases linearly with resolution and power consumption increases
Solution Approach 1:
The time measurement function is segmented into coarse measurement (using a single delay chain with selectable tap points) and fine measurement (using a time amplifier that magnifies small time differences). This segmentation allows achieving high resolution without requiring a full Vernier structure with two long delay chains, thereby reducing area while maintaining precision.
Solution Approach 2:
The patent combines the delay chain structure with a time amplifier in a hybrid architecture. The delay chain provides coarse time measurement and the amplifier provides fine resolution by magnifying small time differences. This merging allows the system to achieve Vernier-level resolution without implementing the complete Vernier structure, reducing both area and power consumption.
2Measurement precision
If Vernier TDC with long delay chains is used to achieve high resolution, then time resolution is improved, but power consumption increases
Solution Approach 1:
The measurement function is divided into coarse (delay chain) and fine (amplifier) components. The amplifier only processes small time difference signals from the delay chain, consuming power only when fine measurement is needed, rather than continuously powering long delay chains as in Vernier TDC.
Solution Approach 2:
The system dynamically switches between coarse and fine measurement modes. The time amplifier is activated only when small time differences need to be measured, making the power consumption adaptive to the measurement requirements rather than continuously high as in Vernier TDC structures.
3Measurement precision
If time difference amplifier is used to achieve sub-picosecond resolution, then measurement precision is improved, but the amplifier is process, voltage or temperature intolerant
Solution Approach 1:
The patent incorporates feedback mechanisms in the time amplifier design that compensate for PVT variations. The feedback loops continuously adjust the amplifier parameters to maintain accurate time difference measurement despite process, voltage, or temperature changes, thereby improving PVT tolerance while maintaining sub-picosecond resolution.
Solution Approach 2:
The system dynamically adjusts operating parameters of the time amplifier based on detected PVT conditions. By changing bias voltages, current levels, or other operational parameters in response to environmental variations, the amplifier maintains its measurement precision and tolerance against PVT changes.
4Measurement precision
If multiple time difference amplifiers are connected in series to achieve desired time gain and resolution, then measurement precision is improved, but device complexity increases
Solution Approach 1:
The time amplifier is designed with built-in gain stages that provide the required time multiplication factor in a single unit. By pre-calculating and implementing the necessary gain within one amplifier, the patent eliminates the need to cascade multiple amplifiers, thereby achieving high resolution without increasing system complexity.
Solution Approach 2:
The time amplifier is designed as a universal module that can provide both coarse and fine measurement capabilities, as well as adjustable time gain, all within a single integrated circuit. This multi-functionality replaces what would otherwise require multiple separate amplifier stages, reducing overall device complexity while maintaining measurement precision.
Data Source
AI summary
The present disclosure relates to a circuit and method of operation thereof for linearized time amplifier architecture for sub-picosecond resolution. More particularly, the disclosure is directed to an asymmetric edge manipulator whose output is fed to four series of transistors and is operatively coupled to a reset. The disclosure relates to outputting a pair of signals that correspond to a first input and second input of a known and measured clock that may be adjustable with gain to be perceptible to an external device that can then correct for the gain to allow measurement of sub-picosecond resolution.