Liner-Free Via Interface Structure for Lower Interconnect Resistance
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Solution Overview
Problem
Current interconnects in semiconductor devices fabricated with a liner layer at the interface between metal vias and metal lines of metallization layers result in increased via resistance.
Innovation Solution
A subtractive patterning process is used to remove the liner layer from the interface between the metal via and metal line of the second metallization layer, reducing via resistance by eliminating the liner layer at this interface.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a liner layer is disposed at the interface between metal via and metal line of second metallization layer, then reliability of interconnect structure is improved, but via resistance increases
Solution Approach 1:
The patent applies local quality by selectively removing the liner layer only from the via interface region while preserving it in other areas. The subtractive patterning process creates a spatially differentiated structure where the liner layer is present in some locations (providing reliability) but absent in the via interface region (reducing resistance). This localized modification resolves the contradiction by optimizing the liner layer distribution rather than uniformly applying or removing it throughout the interconnect structure.
2Manufacturing precision
If liner layer is removed from via interface, then via resistance decreases, but manufacturing complexity increases
Solution Approach 1:
The patent employs preliminary action by first forming the liner layer across the entire interconnect structure before selectively removing it from the via interface region. This approach allows the liner layer to be initially deposited in a simple, uniform manner, and then the subtractive patterning process selectively removes it only where needed. The preliminary formation simplifies the overall manufacturing process compared to attempting to selectively deposit the liner layer only in specific regions from the outset.
Data Source
AI summary
An interconnect structure includes a first metal via disposed on a first metal line of a first metallization layer disposed in a dielectric layer, a first liner layer disposed on the dielectric layer, and a second metallization layer containing a first metal line disposed on the first liner layer and the first metal via.


