Liner Material in Vertical Memory Trenches Prevents Oxidation
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Solution Overview
Problem
Conventional methods for forming vertical memory arrays in microelectronic devices lead to undesirable stresses, defects, and current leaks due to increased feature packing densities and reduced margins for formation errors, affecting memory device performance, reliability, and durability.
Innovation Solution
A microelectronic device structure with a stack of vertically alternating conductive and insulating tiers, including pillar structures and trenches filled with a dielectric material, where a liner material is used to prevent oxidation and reduce defects by forming a barrier between conductive structures and dielectric materials, thereby improving threshold voltages and reducing voids and outgassing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conventional methods are used to form vertical memory arrays with increased feature packing densities, then memory density is improved, but stresses, defects, and current leaks increase
Solution Approach 1:
A liner material is introduced as an intermediary layer between the dielectric material and the conductive structures (word lines, bit lines, select gates). This liner material acts as a barrier that prevents direct interaction between the dielectric and conductive materials, thereby eliminating current leakage paths and reducing stresses while maintaining the high-density vertical memory array structure
2Quantity of substance
If feature packing densities are increased to enhance memory density, then memory density is improved, but margins for formation errors decrease leading to defects
Solution Approach 1:
The liner material is deposited beforehand between the dielectric and conductive layers to create a protective buffer layer. This pre-established barrier compensates for potential formation errors and variations in the fabrication process, preventing defects such as punch-through and ensuring reliable electrical isolation even when manufacturing tolerances are tight
3Quantity of substance
If conventional dual deck configurations are used with direct electrical coupling, then memory density is improved, but access line contact over etch stresses and current leakage increase
Solution Approach 1:
The liner material serves as an intermediary barrier between the dielectric and conductive structures in dual deck configurations. It prevents direct contact and potential current leakage paths between access lines in the upper and lower decks, eliminating over-etch stresses and current leakage issues while maintaining the high-density dual deck architecture
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution reduces defects and enhances performance by preventing oxidation, voids, and current leakage, leading to improved yield and reliability of microelectronic devices.
Implementation Method 1
a liner material is used to prevent oxidation and reduce defects by forming a barrier between conductive structures and dielectric materials
Implementation Method 2
forming a barrier between conductive structures and dielectric materials, thereby improving threshold voltages and reducing voids and outgassing
Data Source
AI summary
A method of forming a microelectronic device includes forming a microelectronic device structure. The microelectronic device structure includes a stack structure comprising insulative structures and electrically conductive structures vertically alternating with the insulative structures, pillar structures extending vertically through the stack structure, an etch stop material vertically overlaying the stack structure, and a first dielectric material vertically overlying the etch stop material. The method further includes removing portions of the first dielectric material, the etch stop material, and an upper region of the stack structure to form a trench interposed between horizontally neighboring groups of the pillar structures, forming a liner material within the trench, and substantially filling a remaining portion of the trench with a second dielectric material to form a dielectric barrier structure.


