Lining Layer Patterning for Fine-Pitch Semiconductor Structures
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Solution Overview
Problem
Existing semiconductor device structures face limitations in forming fine-pitch patterns due to the resolution constraints of photolithographic processes, which affect the degree of integration and precision in feature fabrication.
Innovation Solution
A method involving the formation of first and second mask patterns, with energy removable spacers and a lining layer, is used to etch a target layer, allowing for the creation of fine-pitch patterns by controlling etching rates and pitches through specific masking and processing steps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If photolithographic processes are used to fabricate semiconductor features, then the manufacturing process is established and reliable, but the resolution of the exposure apparatus becomes a limitation that prevents forming finer pitch patterns
Solution Approach 1:
The patent divides the single photolithography step into multiple patterning steps. First mask patterns are formed with a first pitch, then energy removable spacers are formed on sidewalls, followed by formation of second mask patterns with a second pitch. This segmentation allows achieving finer pitch patterns that would be beyond the resolution limit of a single photolithography exposure.
Solution Approach 2:
The patent transitions from planar patterning to three-dimensional patterning by forming energy removable spacers on the sidewalls of first mask patterns. This vertical dimension addition enables multiplication of patterns and achieves finer pitch through self-aligned spacer formation rather than relying solely on optical resolution.
2Quantity of substance
If the pitch size and critical dimension are reduced to increase integration, then the degree of integration is improved, but the resolution requirement exceeds the capability of existing exposure apparatus
Solution Approach 1:
The patent performs preliminary patterning by forming first mask patterns with a relatively larger pitch that is within the exposure apparatus resolution capability. Then energy removable spacers are formed on their sidewalls, and second mask patterns are formed between them. This preliminary action enables subsequent formation of finer patterns without requiring the exposure apparatus to directly resolve the final fine pitch.
Solution Approach 2:
The energy removable spacers act as intermediaries between the first mask patterns and the second mask patterns. They are formed on the sidewalls of first mask patterns, provide physical separation and alignment reference, and are subsequently removed to enable formation of second mask patterns with finer pitch. This intermediary structure bridges the gap between what the exposure apparatus can directly form and the finer patterns desired.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enables the formation of semiconductor device structures with finer pitches than previously achievable, enhancing integration and precision in semiconductor feature fabrication.
Implementation Method 1
performing an energy treating process on the energy removable layer to transform portions of the energy removable layer into treated portions
Implementation Method 2
etching the target layer using the first mask patterns and the second mask pattern as a mask
Data Source
AI summary
A method for preparing a semiconductor device structure includes forming a target layer over a semiconductor substrate, and forming a plurality of first mask patterns over the target layer. The method also includes forming a lining layer conformally covering the first mask patterns and the target layer. A first opening is formed over the lining layer and between the first mask patterns. The method further includes filling the first opening with a second mask pattern, and performing an etching process on the lining layer and the target layer using the first mask patterns and the second mask pattern as a mask such that a plurality of second openings are formed in the target layer.