Link Aggregation Load Balancing With In-Order Packet Delivery
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing networking devices suffer from poor network performance due to the reliance on hash functions for load balancing and link aggregation, leading to uneven bandwidth utilization and potential overutilization of output ports, which can cause failure conditions.
Innovation Solution
The network switch circuitry breaks flows into packets and assigns them to output ports based on real-time bandwidth utilization, using AI engine circuitry to predict future bandwidth needs and reassign packets to ensure in-order delivery and balanced port usage, with an ordering mechanism to maintain packet sequence.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If hash functions are used for load balancing on link aggregation groups, then device complexity is reduced and ease of operation is improved, but bandwidth utilization becomes uneven and port overutilization occurs
Solution Approach 1:
The patent implements dynamic load balancing that adapts to changing network conditions in real-time. The system continuously monitors bandwidth utilization across output ports and dynamically adjusts packet assignment decisions, transitioning from static hash-based allocation to adaptive routing that responds to actual port utilization states, thereby preventing overutilization while maintaining operational simplicity
Solution Approach 2:
The system incorporates feedback mechanisms by monitoring bandwidth utilization metrics from output ports and using this information to inform subsequent packet assignment decisions. The load balancer receives feedback about port utilization levels and adjusts its routing decisions accordingly, creating a closed-loop control system that prevents overutilization while maintaining balanced load distribution
2Reliability
If packets are reassigned to different output ports to balance load, then bandwidth utilization is improved, but packet delivery order may be disrupted
Solution Approach 1:
The patent segments the packet handling process into distinct phases: assignment decision, buffering, and ordered release. By dividing the flow into individual packet units and managing them through separate stages with dedicated buffers for each output port, the system can reassign packets to different ports while maintaining global order through coordinated buffer management and release timing
Solution Approach 2:
The patent introduces intermediary buffering mechanisms between the assignment decision and final packet transmission. Buffers act as intermediaries that temporarily hold packets assigned to different output ports, allowing the system to balance load across ports while ensuring packets are released in the correct order, thus mediating between load balancing requirements and delivery order constraints
3Reliability
If AI engine circuitry is added to predict bandwidth needs, then network performance and stability are improved, but device complexity increases
Solution Approach 1:
The patent replaces complex mechanical or software-based AI processing with dedicated AI engine circuitry that performs bandwidth prediction through hardware-accelerated operations. This substitution of general-purpose computing with specialized hardware circuits maintains predictive capabilities while reducing overall system complexity through optimized, purpose-built components that handle AI inference efficiently
Solution Approach 2:
The AI engine circuitry performs preliminary bandwidth prediction before packets arrive at the load balancer. By predicting future bandwidth requirements in advance and pre-computing assignment decisions based on predicted utilization patterns, the system prepares routing information beforehand, reducing real-time decision complexity while maintaining stable and balanced load distribution
Data Source
AI summary
Systems, apparatus, articles of manufacture, and methods are disclosed. An example apparatus to perform network switching comprises: interface circuitry, machine-readable instructions, and at least one programmable circuit to at least one of instantiate or execute the machine-readable instructions to: assign a first portion of a plurality of packets from a flow to a first output port of a link aggregation group (LAG) and a second portion of the plurality of packets of the flow to a second output port of the LAG, the assigning of the second portion of the plurality of packets to the second output port based on oversubscription of the first port of the LAG, and cause transmission of the plurality of packets across the first output port and the second output port in an order that maintains a relative position of the plurality of packets from the flow.


